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.... '""i" ' ' DIGITAL FUNDAMENT~ LS There are several ways of getting data into and out of a microprocessor. This lesson covers input/output (1/0) operations and microprocessor interfacing. • LESSON 9: INPUT/OUTPUT OPERATIONS By Louis E. Frenzel IN THE PREVIOUS LESSON WE DISCUSSED the operation of microprocessors. We showed how the microprocessor, which is a miniature digital computer on a chip, can perform virtually any digital function that can be duplicated with discrete logic devices, such as gates and flipflops. The microprocessor can be programmed to perform arithmetic functions as well as logical operations such as AND and OR. It can also do storage operations in registers or memory chips, and other functions such as exclusive OR comparing, counting, shifting, and all those functions you ordinarily associate with SSI and MSI logic chips. The microprocessor is so versatile, in fact, that it has virtually replaced individual logic circuits in many digital designs. A microprocessor, which is an integrated-circuit central processing unit (CPU), is referred to as a processor because its primary function is to process digital data. By process we mean manipulate the binary numbers supplied to it in such a way as to create new binary numbers as required by the application. In other words, the microprocessor accepts inputs from some source, processes them according to the application, and generates new signals which are then sent as outputs to some destination. Our main focus in the previous lesson was on the processing power of the microprocessor. In this lesson we want to focus on the input and output functions. That is, how do we get the data into and out of the microprocessor? Input/output (1/0) operations are essential to any microprocessor-based equipment. The microprocessor can usually perform the desired processing, but there must be some formal means of getting the data into and out of the processor. That is done with a circuit called the interface. Our emphasis in this lesson will be on how the microprocessor communicates with the external circuits and equipment via the interface. Types of 1/0 There are three basic types of input/output processes used with microcomputers. They are programmed 1/0, interrupt 1/0, and direct memory access (DMA). Let's take a look at each of those key methods, as well as a ._ .1riation of the programmed 1/0 method called "memory-mapped 1/0". Programmed 1/0 The simplest and most widely used way of getting data into and out of a microprocessor is to simply pass it through the accumulator or one of the general purpose registers in the microprocessor (see Fig .1 ). Special input and output instructions cause the data transfers to occur when executed. For example, to perform an output function, a desired binary number, word or bit pattern is loaded into the accumulator register. Then an output instruction is issued. That causes the data in the accumulator to be placed on the data bus where it is picked up by the interface and passed on to some external circuit or equipment connected to it. The number in the accumulator is not erased or destroyed. An input operation is performed in a similar manner. An external circuit or device sends its data to the interface which, in turn, places it on the data bus. An input instruction is then executed. That causes the input data to be transferred via the data bus to the accumulator register. Additional instructions in the program will then cause the word to be stored in memory or otherwise operated upon. AUGUST 1988 63 A A ACCUMULATOR REGISTER v--,, MICROPROCESSOR (CPU) . A CONTROL SIGNALS DATA BUS y r CONTROL SIGNALS ,I UD INTERFACE L -- • ADDRESS BUS 1-- I> • RAM -• - r ' SILICON CHIP r ' ~ EXTERNAL CIRCUIT, ::::ER~RL EQUIPMENT INTERRUPT INTERRUPT Fig.1: the most commonly used way to get data into and out of a microprocessor is to simply pass it through the accumulator or one of the general purpose registers. • ' ' ROM In order for a programmed 1/0 transfer to occur, two conditions must be met. First, the external circuit or peripheral device must be addressed or identified. Second, that circuit or device must indicate to the microprocessor that it is ready to send or receive data. To identify or enable an external circuit or device, the microprocessor usually issues an address word when an 1/0 instruction is executed. That address appears on the standard address bus of the microprocessor. In some CPUs, the entire address word (usually 16 bits) is used for the 1/0 device address. In other CPUs, only the eight least significant bits are used. Even with only eight bits, up to 256 external devices and circuits can be identified. That is far more than ever needed. The interface contains an AND gate decoder that is set up to recognise a particular address word. Should the address of that device be placed on the address bus, it will be identified and the interface will be enabled. Second, once the external device has been selected with the address, it must be ready to send or receive data. To illustrate this, assume that the microprocessor is sending ASCII characters to an external printer. Printers are slow mechanical devices and they cannot operate as quickly as electronic circuits. If the microprocessor sends the information to be printed at its maximum rate, the printer will not be able to keep up. Data will be lost. For that reason, some circuitry must generally be incorporated to permit the remote printer to tell the computer when it has received a character and printed it, and that the printer is ready for the next one. The same is true on input. An input instruction may be executed, but the external device may not have data re_ady to put on the bus. The external device must signal the interface, which can then inform the microprocessor of its readiness. The readiness indication is usually handled by a short segment of instructions that poll the external devices, waiting for a signal that indicates they are ready. A single logic signal generated within the external circuit or device and passed along by the interface can be placed on the data bus and the microprocessor can read it repeatedly, looking for a particular condition. If the pulse is a binary 0, then the external device is 64 . . not ready. If that pulse becomes a binary 1, then the readiness condition is signalled. The microcomputer inputs that pulse, checks its value with a short sequence of instructions, and determines that data may now be sent or received. The actual transfer of data takes place when one or more control signals are sent from the CPU through the interface to the external device. Those control signals are either generated directly by the microprocessor or can be derived from selected signals on the microprocessor control bus using simple logic gates. Interrupt 1/0 A modified form of programmed 1/0 is called "interrupt 1/0". Every microprocessor has an input signal called an interrupt. It does not have to be used; but if it is used, it greatly facilitates input/output operations. An interrupt is a signal from an external circuit or device which indicates to the CPU that some input or output operation is called for or desired (refer to Fig.1). That is similar to the input signal described previously, which must be periodically checked with an input operation to ascertain if the external device is ready. The interrupt provides a way to signal the microprocessor and causes it to interrupt any program in progress and perform the desired 1/0 operation. Using the polling technique described in programmed 1/0 is a wasteful and time consuming process. It means that the microprocessor must continually look for an input signal from the external device. It simply waits until that external device is ready. That is an inefficient use of the processor because ordinarily other computing operations could go on while you are waiting. Interrupt 1/0 makes that possible. The microprocessor may go about executing other programs until an input or output operation is desired. When an interrupt occurs, the microprocessor finishes executing any instruction currently in progress. Then, it stores the content of the program counter in the stack. (Recall that the stack is an area of RAM set aside for temporarily holding addresses and data words). By storing the program counter, the microprocessor thereby remembers its place in th0 current program. Remember that the program counter always points to the next instruction to be executed. Once an instruction is complete, the program . MICROPROCESSOR (CPU) . DATA BUS DATA PATH - \r- A r INTERRUPT ill !J RAM . ADDRESS PATH ADDRESS BUS ~ 1/D INTERFACE ... F INTERRUPT EXTERNAL DEVICE (le HARO DISC) F I ADDRESS COUNTER CONTROL LOGIC I INCREtNT OMA CONTROLLER CHIP Fig.2: in direct memory addressing, a DMA controller is connected as if it were an output device. It can therefore be set up by the microprocessor prior to a given operation. counter is incremented so that it points to the next instruction in sequence in the program. By storing that address, the processor can pick up where it left off once the called-for input or output operation is complete. In addition to storing the program counter, other information may also· be saved. The contents of the accumulator, which usually contains the intermediate results of a calculation, are also stored on the stack. The contents of other registers may also be saved in the stack if necessary. The saving of all that information may take place automatically in some processors but, in others, special instructions associated with the stack must be used. For example, a PUSH instruction causes register data to be put on the stack. A POP or PULL instruction causes information to be retrieved from the stack and put back into the appropriate register. Once the status of the microprocessor has been saved, the interrupt signal causes the program counter to be automatically loaded with a predetermined address. In some microprocessors, that address is zero (0000 hex); in others it is the maximum address value (FFFF). With that number loaded into the program counter, the microprocessor then looks for an instruction at that location and fetches the instruction word stored there. That is usually a jump or branch instruction that loads the program counter with another address that points to a subroutine stored in RAM that will carry out the desired I/O operation. A subroutine is a short sequence of instructions designed to perform some specific operation. It may be a calculation or some other process. In this case, it is an input or output routine using the standard input and output instructions described under programmed I/0. That subroutine sends data to the device requesting service or accepts input from it. The input or output subroutine passes the data through the accumulator and usually stores it away in memory for later use. Once the I/O operation is complete, a RETURN instruction at the end of the subroutine is executed. That causes the microprocessor to go back to where it left off. It automatically retrieves all the data stored in the stack and the address for the program counter. The microprocessor then continues with the program it was executing prior to the interrupt. Interupt I/O is an extremly efficient and productive way to handle input or output data transfers. It allows the computer to continue computing as long as no input or output operation is desired. Most microprocessor I/O is interrupt driven. Where more than one I/O device exists, multiple interrupts must be dealt with. That is usually handled by an external interrupt chip, which accepts inputs from several sources and generates a single interrupt to the CPU. The chip also helps the microprocessor identify which external device generated the interrupt, so that the proper address can be put on the address bus for enabling that device interface prior to executing the I/O subroutine associated with it. Memory Mapped 1/0 Some microprocessors use a special form of I/O known as memory-mapped I/0. Special input and output instructions are not used. Instead, the existing LOAD and STORE instructions are used. In this method of input/output, a peripheral device is treated as if it were simply another memory location in RAM. In many microprocessor applications, the full amount of RAM isn't used. Those unused locations may be used for input/output operations. The external circuits or devices that are to send or receive data are still connected to the data bus and receive an enabling address from the address bus. To perform an input operation, a STORE instruction is executed. Recall that a STORE instruction simply takes the contents of the accumulator or some other register and sends it to a location in RAM designated by the address portion of the instruction. That address word identifies the external device to receive data. An input operation is performed with a LOAD instruction. The LOAD instruction finds a word at the address given in memory and transfers it to the accumulator or some other designated register. The external sending device simply appears to be a memory location where the desired word is. Other than that, the input/output operations are carried out in the same way. Either programmed or interrupt data transfers may take place. AUGUST 1988 65 +v r-----------------, I ' ACCIJMULAtOR DATA BUS (8 BITS) REGISTER I I MICROPROCESSOR (CPU} AD~~iss I 1 ________ ...J ---1---01 I LED INfflCATOR ~--,-+--O-l-1 _ \_ AND GATE __/ ......._ _1_1- - - - L--,...,,,,...... - -_,.--rr-1-1I - - - LOGIC c~~ml .f1_ L- - - - - - - - - - - - - INTERFACE _ _J Fig.3: inverters are often required ahead of some address lines, which feed an output interface, in order to provide the right combination of Os and 1s for decoding. The 6800 and 6502 microprocessors discussed previously in this series use memory-mapped 1/0 exclusively. Direct-Memory Access The third basic type of input/output operation is known as "direct-memory access" or DMA. As its name implies, input/output operations take place directly between the microcomputer RAM and the external circuit or device through an interface. The microprocessor or CPU is completely bypassed. Input/output operations using microcomputer instructions and causing data to be passed through the accumulator or a general purpose register and an interface are usually slow processes. While more than adequate for peripheral devices and circuits, there are applications where the processor cannot act fast enough. In those cases, DMA can be used. In DMA, the speed of the input/output operation is limited only by the RAM's read/write times. These are typically very fast, of the order of several hundred nanoseconds or less. For this reason, extremely high data rates can be achieved. This is necessary when dealing with high-speed peripheral devices such as floppy and hard discs. In data acquisition applications where high speed analog-to-digital and digital-toanalog converters are used, DMA is invaluable. To use DMA, some external circuitry is required. That is usually contained in a single-chip LSI circuit known as a DMA controller. It contains all the necessary logic and addressing circuits needed to perform the operation. As shown in Fig.2, the DMA is connected to the microprocessor as if it were an output device. In that way, the microprocessor can be used to set up the DMA controller prior to a given operation. For example, before the data transfer can occur, 66 SILICON CHIP the controller must know the starting address in RAM where the data to be transferred are stored. Alternatively, that address may point to the beginning of a sequence of memory locations where input data is to be stored. Using a special subroutine, the microprocessor sends the information to the DMA controller. The address is stored in a special address counter and placed on the microprocessor address bus. The DMA controller seizes control of the address bus and causes the RAM to recognise its address rather than the one directly from the microprocessor itself. The DMA controller also takes control of the data bus. As the data transfers occur, the DMA address counter is incremented. That causes data to be output from sequential memory locations to the external device or causes input data from the external device to be stored in sequential memory locations. Data to or from the external device or circuit are put on the data bus where the RAM circuitry accepts it and stores it. Alternatively, memory may put the desired data on the data bus which will be received by the external device or circuit. Finally, interrupts can be used with the DMA. The external circuit or device will still generate an interrupt to signal the CPU to initialise the DMA controller and begin a necessary data transfer. Microcomputer Interfaces An interface is the collection of logic circuits that connect an external device to the microcomputer. The purpose of the interface is to make the input or output circuit or equipment compatible with the microcomputer. That means taking care of such things as timing, intermediate storage, interrupt generation, voltage-level matching, and logic signal generation. ,---------------7 I 3-:~~JMus 5 51 · JE\Tffe\6E t------ I cout~iRs I --~ I I I I I I I I DATA BUS I I I I MICROPROCESSOR (CPU) I I CLOCK (COUNT INPUTI 3-STATE CONTROL LINE L _____ - - - - , LOGIC CONTROL PULSE fl I I IL I LOAO INTERRUPT FLIP-FLOP s:i -------- ~8Ei1 R,t----i,-CLEAR .n.. _______________ _ Fig.4: in this simplified input interface, a 3-state buffer can also represent a high impedance which effectively isolates the buffers from the line to which they are wired. The interface is generally unique to a specific external device. The logic circuits are assembled to specifically connect that device to the microcomputer and nothing else. Also called a device controller, the interface is sometimes included as part of the input/output device. In other instances, the interface is on a separate printed circuit board and often may be plugged into the bus of a microcomputer. You will also hear the interface called an 1/0 port. The interface performs one of the types of I/O operations that were described previously. Let's take a look at some of the circuit details of a typical interface. Output Interface Suppose that we wish to monitor the binary state of the accumulator in a microcomputer with LED indicator lights. That could be done with a simple output interface that accepts a data transfer from the accumulator register. Such an interface is illustrated in Fig.3. The heart of the interface is an 8-bit storage register where the accumulator contents will be stored. That register uses simple D-type flipflops and their data (D) inputs are connected to the eight lines of the microcomputer data bus. The load. strobe or clock input to the D-type flipflops (labelled T) is controlled by an AND gate, which performs two functions. First, it decodes the address from the address bus and accepts a logic-control pulse from the microcomputer, which causes the data to be strob- ed or loaded into the flipflops . Note here that only eight bits of the address are decoded. The number of bits that must be used in the address to identify an output port depends on how the address lines and memory are allocated. In some microcomputers, the entire 16-bit address will have to be decoded. In other cases, 1/0 ports are designated by only the lower eight bits of the address. In other situations, where not all of the memory is allocated, an unused memory address bit may be used to provide a simple single-line address decoding. As shown in Fig.3, inverters must be used ahead of some address lines in order to provide the right combination of ls and 0s for decoding. Inverters are needed on those input lines that will be binary 0, so that all inputs to the AND gate are binary 1 when the device is selected. In the example shown, the address being decoded is 10110011. To display the contents of the accumulator then requires that an output instruction be executed. For memory-mapped 1/0 microprocessors, a store accumulator instruction would be executed. That would cause the data to be loaded into the register and displayed on the LED indicators monitoring the flipflop outputs. Input Interface Now let's look at a simple input interface circuit. Suppose that you wished to monitor the content of a 2-digit BCD counter. The interface for such a circuit is AUGUST 1988 67 Fig.5: the programmable peripheral interface (PPI) is bidirectional. An 8-bit word sent on the data bus enables one or more ports and configures them for the desired mode. TO MICROPROCESSOR DATA BUS '-"--✓ shown in Fig.4. Clock pulses are stepping the counter for some application. The microcomputer needs this data to perform a computation. At a specific instant of time, the BCD numbers stored in the two counters are transferred to an 8-bit storage register. That is done by a logic pulse developed somewhere in the interface according to the application. This pulse does two things: it loads the storage register and also sets the interrupt flipflop. The output of this flipflop goes to the interrupt-request input line on the microprocessor, signalling the microprocessor that input data is ready. The interrupt causes the current instruction to finish executing; then the status of the processor is stored in the stack. An interrupt service routine is then executed. This is an input instruction that will cause the input data to be read in. When the input instruction is executed, the contents of the interface register will be transferred into the accumulator register. This is done by first activating the interface. The input in!;)truction or, in the case of memory mapped 1/0 microprocessors, the load accumulator instruction, causes an address to be placed on the bus, which is decoded by the interface. This enables the input interface. The decoding AND gate turns on the 3-state logic buffers connected between the interface storage register and the microcomputer data bus. Recall that 3-state logic circuits can assume the normal binary 0 and binary 1 output states but also have a high impedance state, which effectively disconnects them from the line they are physically wired to. Such buffers are required in bus-oriented systems where many systems and devices share a common bus. The 3-state buffers allow the different circuits to be connected to the bus when they are requested to send information. The bus may be continuously applied to any circuit input, but output circuits driving the bus must only be connected to the bus when data is being transmitted. In the interface circuit shown here, the address decoder will turn on the bus buffers, thereby allowing the data stored in the interface register to be placed on the bus and then read into the accumulator by the input instruction. Note that a control pulse from the microprocessor is also a part of the decoder AND gate input. That pulse will occur while the address is applied and will cause the register data to be strobed onto the bus as the bus buffers are activated. 1/0 Integrated Circuits While simple interfaces like those described above can be implemented with various MSI and SSI logic 68 SILICON CHIP DATA BUS BUFFERS iiii--wii-----1 A1- ----I 8 BITS PORT A 8 BITS 4 BITS PORTC VO 8 BITS 4 BITS PORT D VO 8 BITS VO CONTROL CIRCUITS A0- - - - - 1 8 BITS CS- - - < l l l (FROM ADDRESS --DECODER) BBITS VO INTERNAL CHIP BUS gates, in practice, most parallel data interfaces are implemented with special input/output integrated circuits. Those devices are designed specifically to connect microprocessors to external circuits and devices. Virtually all of the circuitry required in an interface is contained within these interface chips. Some examples of the most widely used interface chips are the Intel 8255, Motorola 6820/6821, MOS Technology 6522 and Zilog PIO. Those chips typically feature two or three complete parallel interface circuits that may be configured under program control for either input or output operations. Fig.5 shows a simplified block diagram of the Intel 8255 programmable peripheral interface (PPI). It consists of three input/output ports. These may be used independently for either input or output. Each port con. tains a storage register for holding data and also provides the necessary 3-state bus buffers. The configuration of the 8255 is determined by a special control word sent by the microprocessor as part of a program-initialisation sequence. That 8-bit word specifies which of the ports will be used, whether input or output operation is desired, and the desired mode of operation. That 8-bit word is sent over the data bus to the 8255 and stored in the control logic. There it is decoded and various logic circuits enable one or more of the external ports and configure them to the desired operation. The 8255 can operate in three basic modes. In the first mode, the three ports are simply configured for either input or output operation. One or more of them may be used. Note that port C is divided into two independent 4-bit sections. Those may be used separately or together as an 8-bit input or output port. The second mode allows only the use of 8-bit ports A and B. Port C, either onff or both sections, is used to accept "handshaking" signals from or to the peripheral .circuits. These handshaking or strobe signals allow the interface and microcomputer to communicate with one another. That permits the timing and control of the data transfers. The third mode is where only port A is used for both input and output operations. Again, port C is used for handshaking operations. TO MICROPROCESSOR DATA BUS DATA REGISTER A Fig.6: the peripheral interface adapter (PIA) has registers that store control words which designate the operation of the device. Each port has its own pair of registers. 8-BIT INPUT/OUTPUT REGISTERS j COIITROL REGISTER A DATA . . . - - - - - - - --., 1 REGISTER B 8 BITS 8 DATA DIRECTION REGISTER 8 Finally, note the control signals that come into the 8255. The CS line means chip select. Usually the output of a NAND gate address decoder is connected to this line. That enables the chip when the proper address is received. Input bits AO and Al are the two lower order address bits from the address bus. Those are used to select which of the three ports or the control word register is to be selected by the CPU to send or receive data. The RD and WR control signals are strobes from the microprocessor that cause data transfers to take place. CONTROL REGISTER 8 INTERRUPT ADDRESS LINES 1/0 PORT CONTROL LOGIC INTERRUPTS Programmable Interface CHIP SELECT "I•- - -- _J t Another example of an LSI interface chip is the Motorola 6820 or 6821 programmable interface adapter (PIA). That device contains two fully configurable 8-bit data ports, A and B. A simplified drawing of the chip is shown in Fig.6. It contains two data registers used for storing data temporarily in either an input or output operation. Associated with each of the data registers is a datadirection register (DDR) and a control register (CR). The registers are loaded with control words from the microprocessor and these words designate the operation of the PIA. The DDR word configures the 1/0 registers for either input or output operations on a bit-by-bit basis. The control register sets up various control lines for use as interrupts or handshaking lines with the peripherals. The control logic processes the interrupts, helps select the chip, and determines which internal register receives data from the microprocessor bus by interpreting the input address lines. -DATA WORD-------1 L I 1I , J STOP BIT$ PARITY AXED BIT INTERVAL DETERMINES TRANSMISSION SPl:ED IN BAUD BIT Fig.7: in an asynchronous serial-data transmission, bits representing data are flanked by start and stop bits that tell the receiving equipment when to expect data and when the data is complete. The parity is a form of self-test or it can be part of the data. 0 ~ 1 :i. •25 ----+15V - - - - +12/ - - - - + 3 V _ __,__ _ ----ov ---+--- tv -----12V-----L...\--- -- - - - 1 5 V ---+-- VALID LEVELS ON-SPACING BINARY 0 TRANSITION REGION INVALID LEVELS VALID LEVELS OFF-MARKING BINARY 1 TYPICAL SIGNAL SWITCHING BETWEEN -12V(1) AND +12V(O) • ••• •• •• •• • • •• •• •• •• PIN FUNCTION 2 3 TRANSMITTED DATA RECBVED DATA REQUEST TD SEND CLEAR TO SEND DATA SET READY SIGNAL GROUND RECBVED LINl: SIGNAL DETECTOR DATA TERMINAL READY 4 5 6 7 8 20 •14 0 REAR VIEW 25-PIN II-SHELL CONNECTOR Fig.8: RS-232 signals operate between ± 12 volts. Special circuits convert these signals to 5-volt TTL levels and back again. AUGUST 1988 69 Overall, both the 8255 and 6820 are extremely flexible 1/0 circuits that can be configured to deal with almost any type of external circuit or peripheral device. Serial Interfacing So far, all we have talked about are parallel interfaces, those that move data in parallel 8-bit chunks. The data path into and out of a microprocessor is the parallel-data bus, so it makes sense to move data in that format. It is fast and convenient. However, there are occasions when serial data must be used. One example is where data is to be transmitted to and received from a floppy or hard disk. Another example is where data is to be exchanged with a video terminal or some data communications device such as a modem. In those cases, data is sent in 7 or 8-bit segments, one bit at a time. Most data transmitted serially in this way are ASCII characters. Recall that the ASCII code represents letters (both upper and lower case), numbers, punctuation marks, and other special symbols as a 7 or 8-bit code. The format of a serial data word is shown in Fig.7. To the data bits is added a start bit to indicate the beginning of the word, a parity bit which is used for er ror-detecting purposes, and one or two stop bits to designate the end of the word. Each bit occurs for a specific duration. The shorter the duration, the higher the transmission rate. The transmission rate is normally expressed in terms of baud, where one baud is approximately one bit per second. Typical standard baud rates are 300, 600, 1200, 2400, 4800, 9600 and 19.2K. To send and receive such serial data, a specific interface is required. The major elements of such a serial port include bus buffering, address decoding, parallel/serial conversions, logic control, and logiclevel matching. The main purpose of that interface is to provide parallel-to-serial conversion for output data and serial-to-parallel conversion for input data. The interface should also add, extract, and respond to the stop, start, and parity bits. Further, it should control the transmission/reception baud rate. Finally, the interface must make the external serial device compatible with the interface. That generally means using the proper connector and signal connections as well as logic-voltage levels. Most serial devices conform to the popular RS-232 interface. That is an Electronics Industries Association standard that SHORT QUIZ ON DIGITAL FUNDAMENTALS 1 . List the basic types of 1/0 methods used in microcomputers. a. LESSON 9 6. The program used to service a request for an 1/0 operation is called a(n) _ _ _ _ _ _ _ __ 7. In OMA 1/0, data transfers take place between the _ _ _ _ _ _ _ and the _ _ _ _ _ __ b. c. 2. What register in the CPU is usually used for 1/0 operations? a. instruction register b. program counter c. accumulator d. address register 3. An external signal that signals the CPU for an 1/0 operation is called a(n) _ _ _ _ _ _ __ 4. The stack is a(n) : a. set of registers b. read-only memory c. first-in first-out memory d. area in RAM for temporary storage 5. Which type of 1/0 makes the most efficient use of CPU time? a. interrupt b. programmed c. memory-mapped d. OMA 8 . Treating a memory location like an 1/0 port is called _________________ 9. The circuit that connects the computer to the external device is called a(n) _ _ _ _ _ _ __ 10 . What circuit acts as inputs from a peripheral a. register b. 3-state drivers a buffer between the device and the CPU? c. decoder d. multiplexer 11 . The most commonly used serial interface is the __________________ 1 2 . What is the name of performs serial-to-parallel conversions? a. PIA b. OMA the LSI circuit that and parallel-to-serial c . PPI d . UART 1 3 . Serial data transfer speed is expressed in either ________ or _ _ _ _ _ _ __ ANSWERS (puooas Jad si1q) sdq JO pneq '£ ~ ll::IVn ·p ·c: ~ C:£C:·Sl::I Vl3 . ~ ~ sJa11pp aiei s-£ ·q ·o ~ a0BJJatU! '6 70 SILICON CHIP O/1 paddew-AJowaw ·g ao111ap O/1 pue AJowaw · L au1in0Jqns ·9 tdOJJ8lU! ·e .9 a6eJots AJeJodwai J0J pasn I/\IVl::I LI! eam ·p ·v tdOJJatU! '£ Jote1nwnooe ·o ssaooe AJowaw ioaJ!P ·o 0/1 tdnJJ8lU! ·q O/1 pawweJ60Jd ·e . ~ ·c: ,------------------~I I STOP PARITY START I I m -~- m __ I TO DATA BUS MICROPROCESSOR DATA BUS ..,.__ _,,. BUFFERS I I ...,__.__...__ _._~ SHIFT REGISTER I I I SERIAL 1----,,-DATA OUTPUT TRANSMIT CIRCUITS RS-232 INTERFACE ClRCUITRY I PARITY CHECK I _____________ UART_j CLOCK (SETS BAUD RATE) ADDRESS DECODE - . . , _ _ . J Fig.9: block diagram of a UART. It is capable of full duplex operation. specifies all of those characteristics. They are summarised briefly in Fig.8. The UART The main logic functions of the serial interface are usually taken care of by a special LSI serial interface chip called a UART, or universal asynchronous receiver transmitter. A simplified block diagram of a UART integrated-circuit chip is shown in Fig.9. Bi-directional data-buffers connect the CPU data bus to the UART. Inside the UART, there are two separate sections: one for transmitting, the other for receiving. The heart of each section is a shift register that performs the parallel-to-serial or serial-toparallel conversion as required. Other logic circuits add the stop, start and parity bits in the transmit mode, or extract and respond to them in the receive mode. Most UARTs can operate full duplex, meaning AC millivoltmeter - SERIAL --DATA INPUT RECEIVE CIRCUITS cs L_ _ _ - SHIFT REGISTER CONTROL --..;..._- CONTROL LINES LOGIC send and receive operations can take place simultaneously. The UART chip is set up and controlled by the host microprocessor. Special data words transmitted to the UART specify things like baud rate; 1 or 2 stop bits; odd, even or no parity; and data word length from 5 to 8-bits. A short initialising subroutine in the main program sets up the UART prior to its use. Another way to create a serial interface is to do it with software. A short program can be written to do the parallel/serial or serial/parallel conversions, deal with the start, stop and parity bits, and provide the timing for the desired baud rate. We will show you how that is done in the next and final instalment of this series devoted to microprocessor programming. lltl Reproduced from Hands-On Electronics by arrangement. (c) Gernsback Publications, USA. ctd from page 23 resistor (or shorted, according to the manufacturer's specs). The amplifier's output voltage will then drop to a very low value. The next step is to move the Mode switch to the Noise setting. The Noise range switch should be at the 0dB setting. Now we switch down the input attenuator until a reading above 1/3 of meter deflection is obtained. If the amplifier is any good (ie, reasonably quiet), very little pointer deflection will be obtained even on the lmV range. At this point, we are measuring a signal which is better than - 90dB with respect to the amplifier's rated output voltage of 21.9 volts. (Remember each change of range on the input attenuator corresponds to todB). To increase the gain of the measurement, we start rotating the Noise range switch until the meter's pointer moves up the scale. That may be obtained with the Noise switch on the - 20dB range. If the pointer is indicating - 4dB, the overall signal-to-noise ratio of the amplifier is - 90 + - 20 + - 4dB = -114dB. This is a measurement of the wideband residual noise. For most hifi equipment this measurement would be taken with the 20Hz to 20kHz filter selected which will normally improve the measurement slightly, to say, - 116dB. If an 'A' weighted measurement is taken instead, the reading may improve slightly again, particularly if there is hum in the residual noise. The procedure is similar when measuring separation between channels of a stereo amplifier, except that the Flat filter condition would be selected. Next month, we will conclude the description with the info on construction and calibration. lltl AUGUST 1988 71