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An error analyser for CD players, Pt.2 This month,·we present the second in a series of articles describing a CD error analyser. We have a look at the various Philips CD chipsets in use and describe the circuit of the analyser. By STEPHEN McBRIDE* As mentioned last month, this description is based on the Philips chipsets though the bulk of the information will also apply to most other brands. The various Philips chipsets are as follows: CDl uses the SAA70x0 set with two TDA1540 14-bitD/ A converters; CDZ uses the SAA7210 and 66 SILICON CHIP SAA7220 with the TDA1541 twin 16bit DAC; CD3 uses the SAA7310 and SAA7220 with the TDA1541 twin 16bit DAC; CD3a uses the SAA7310 and SAA7320 Bit Stream Modulation system; and CD4 uses the SAA7310, SAA7220 and the SAA7320 Bit Stream system. If we were to describe all the differences between the various chipsets, we would have to present an entirely separate article. What concerns us here is the standard error correction format used in all CD players. The key process is CIRC (Cross Interleaved Reed-Solomon Code - as defined last month). A CD player in action A CD player uses servo controllers to position the laser assembly under the spiral track of pits and lands. As the disc rotates, the photodiodes produce a signal which is amplified and then fed through a high pass filter to produce the HF signal. The HF is fed into the DEMOD circuit. DEMOD has its own PLL oscillator which runs in sync with the incoming HF signal which may fluctuate in frequency slightly. Then there• are several blocks of processing with the end result being the recreation of the original bit clock and extraction of the subcode, audio and parity information, and frame and block sync signals. DEM0D also provides EFM decoding and outputs subcoding, clock signals and the audio data stream. (Note: this terminology was explained in last month's article). The audio symbols are clocked into a shift register in ERC0 at a rate set by DEM0D. Once a complete frame has been passed, (ie, 32 symbols), DEM0D signals ERC0 that it has filled ERC0's input buffer. DEM0D then goes about extracting the next frame from the HF signal. ERC0 quickly moves the new frame into an area of RAM to await further processing. When ERC0 is ready for the next frame, it clocks it out of RAM at its own quartz crystal derived clock frequency. No wow and flutter Since the audio data is fed through the ERC0 process in a different timespan to when DEM0D read it, and its propagation is timed by a very accurate timebase, the PCM audio data emerging from ERC0 is free from any fluctuations in speed that DEM0D may be experiencing or causing. So, because of the RAM buffering, the audio data stream is completely free of wow and flutter. ERC0 de-interleaves the data and performs CIRC error correction on all audio symbols and uses parity blocks to locate erasure corrections (an erasure correction is an erroneous symbol whose precise location is known). Once ERC0 has finished its work, it serially clocks out the audio data to the interpolator and muting section, CIM. If ERC0 is unable to correct all symbols, the erroneous ones are marked with a flag. For the SAA7000 CIM, single errors are interpolated and multiple error bursts are muted (see definition in last month's article). ERC0 generates a UNEC flag to mark the errors. The position of the UNEC flag in relation to the clock pulse tells CIM whether to interpolate or mute. In the event of mute action being needed, ERC0 gives CIM a 5-frame advance warning that an error burst is about to be sent through. This badly scratched compact disc was used to obtain the very high readings shown in the photograph on the facing page. Normally, the readings from a 'clean' CD would be nowhere near this high. The SAA7210 and SAA7310 perform basic (single symbol) interpolation internally. If a multiple burst occurs, they hold the last known valid value until the errors pass and then interpolate the last two values prior to the valid data returning. In either case, they both generate a flag, EFAB, to signal to the SAA7220 (if fitted) that further action should be taken. The SAA7220 has the ability to enhance the error handling capabilities by providing linear interpolation of up to eight consecutive errors. EFAB tells it where it needs to act. After the CIM section, the data stream is fed into a digital transversal filter where it undergoes 4x oversampling, stepping up the effective sampling rate from 44. lkHz to 176.4kHz. After oversampling and digital filtering, the signal is moved to the DI A converters which convert the two's complement, 16-bit audio samples into an analog current. A current to voltage converter follows, then finally a third order Bessel filter to remove any unwanted harmonics. Some players also have a de-emphasis circuit incorporated into the I-V converter whose action is controlled by a signal from the decoder. In addition to its audio symbol manipulation, ERC0 also generates a PWM (Puls e Width Modulation) signal called MCES (Motor speed Control, Erco to Servo) which is obtained by subtracting the current write address pointer from the current read address pointer of the CIRC storage RAM. If the memory is 50% full, the PWM signal runs at a duty cycle of 50%. If the memory is greater or less than 50% full, the duty cycle changes to alter the disc turntable motor speed, thus increasing or decreasing the data flow rate.into the RAM buffer. This system allows the RAM to stay around 50% full, thus giving maximum data buffering capabilities between the data coming from the disc and the quartz oscillator clocked data leaving ERC0. From the time audio data leaves ERC0 right up to the point of DI A conversion, the propagation rate in all stages is controlled by clock signals derived from the master quartz based oscillator, hence no wow and flutter, etc. Philips was the first to use digital speed control for the disc motor and most other companies have now followed suit. The SAA7320 is radically different. It uses a 256-times oversampling digital filter and creates a 1-bit PDM (Pulse Density Modulation) signal which feeds a 1-bit DAC running at a 11.2896MHz; ie, 191.9232 Mbitls. And you thought your PC worked hard! This 'Bit Stream Modulation' offers certain advantages over conventional DACs - in particular, better linearity at low signal levels, where 16-bit DACs perform poorly. The operation of Bit Stream Processors requires a someAUGUST 1991 67 what lengthy exp lanation which I won't cover here as it's not important to the project. +VCC +5V +VCC a +5Va + L1 10+ 47uH How the error analyser works The CD Error Analyser (CDEA) has two ?-segment displays to count the number of data dropouts and interpolations which have occurred during playback of a compact disc. Both counters operate on a real time basis; ie, the counters are incremented as the events occur. Both displays have four digits but there are facilities to extend the interpolation counters to five or six digits if so desired. Overflow indicators flash if the number of detected events exceeds the counter's capabi lities. The counters ignore errors which occur during track searching as these are not faults. · Why have extra digits on the interpolation counters? Well, more than 9999 dropouts on a disc is rare and indicates the disc is in urgent need of cleaning, but one sizeable dropout can cause thousands of interpolation errors; ie, it could overflow the interpolation counters very quickly. A 6digit display needs 1,000,000 counts to overflow it. Both the main and display PC boards have facilities for 4, 5 or 6-digit configurations. Other niceties include automatic resetting of the counters at the start of play and remote power on/off controlled by the CD player's power switch. The CDEA has three PC boards: a main board and a display board which mount at right angles to each other and are housed in a low profile instrument case. The third PC board is a small satellite board fitted inside the CD player. This board acts as a buffer to prevent loading of the player's digital circu its by the cable to the CDEA unit. It also has facilities to configure the unit to suit the logic levels and phase (normally high or low) of the CD player's circuitry. Details on how to configure this PC board to suit your F1 100mA 820k 1k 1! + 10k DISABLE I 33+ RX4i I I I N X MUTE 2 Y J <>-0-- MUTE 1 U 0---0-- I I T s SMSE, MUTE, MUSB .,. + I ATSB 01! b MUTE +5Va I •o! I 13 +5Va I I HFD C HFD 1k HFD I VREF2 I COUNT 1k I I COUNT I d UNEC ,EFAB 10 I I I I UNEC,EFAB I I I FCO ,RD _ r-----4>-------•5Va 1k RESETl I e FCO,RD I I 10k ovo----~.___...,______...,__~~o--cl;I RESETI I j 7-PINDIN 2-_A~LITE !'.E_B ~TED INSID~DMPAC:!_lll~~E~ _ P~ii:rr° g.,. 11 l -6-CORE+SHIELD FLASHOVER , - -BARRIER - - --7 A RX1 +VCC a B I l 240VAC + OC1 MDC3041 10 '~""' • 1 N n - - -- GND 1 Eo---+ .,. I I I I I EOc VIEWED FROM BELOW +5Va ' U' OUT 1000 + 25VW+ FARNELL 178-369 +5Vb 10 TANT+ L----- RELAY HE721A05 5V 5000 I D10 1N4004 I .___ _ _..~~,._.-o ------------------·--, R Fig.2: the circuit for the CD Error Analyser is fairly straightforward. IC8a-lC8c provide the interfacing to the CD player & drive two 74C926 4digit counters (IC3 & IC4) via NAND gates ICtb-ICtd. IC5, IC6 & IC7 provide an opnonal 5 or 6-digit readout for the interpolation display. 68 SILICO N CIIIP 47? ':' I I I X + + + 1 TANT! a 7.5V '--.-.(!\.---------' OR V Ex 1/ J D8 ·u· R S 2x1N4004 ~ M ·Oz,___ _ _ _ _ _ __, OR +5Vb4_,,__.-.,_..,-1-_._-_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _.,.__ _ _ _ _ _ _ _ ___, 5 6 LAT OISP EN SEL 18 vc~ 15 OROPOUTS 7x1000 Q4 BC328 a.,:.::.--Yt\\,----7:.ia b 16 6b a cl-'1-"-7_ _..,,,.,.,__..;4'-IC 1,-,b dl-'1---IN,;,.----'2"!d _g_ el!2"----IIN,.---1'1e •J Jc 11'3"---#N.---'g"f I ,, -d- 4 2.2k E sf'?, ~c 0IS 1-4 4xLTS 47AG 56k 22 + RBLL? 10 g OVERFLOW ~ IC3 74C926 .-----e------+5Va A7 Q6 BC338 s/?) 2 COUNT - - - - - - '1:.::i Q7 BC338 C ~E ~ ~E ,,_.J] RESET ~.,. 560{) Q3 8 3 6-~ 10k ~~ C _______J S "\,.I0-'-4-4--'VWi.--Bc.+,/-Iy IC2b 5_.r 4093 Q8 BC338 C sl?) O 11 ..,e C\ t) BI/) C 10 - 05 (. IN4004\: 10k \..::) E CARRY 14 ~ L-------------------------------~ 0.1 10k ►--------------------------------------1::1--~-'¥W+r-..----'•- .---e-+---------e---.....,._ +5Vb 04 1N4004 _G\ 47! 5 6 18 W~f[ vcc +5Va INTERPOLATIONS 15 7x100n b 16 C 17 d 1 4 .. OIS 5-8 4xLTS547AG 1e e2 ~ C 10 g COUNT 13 +5Va IC4 74C926 IC2d s OVERFLOW LED1 11 r.-:,. 12 A7 Q10 BC338 56011 C BI/) B8 Q2 8C338 g IC2c ~E s ~ 10 10k 4_F C 10 ...J} RESET 012 BC338 01T C al? D 11 C BI/ I CARRY 14 / 4F INSTALL LINK FOR 4,5 OR 6 DIGIT _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ___.4a~" '..,. INTERPOLATION DISPLAY - 59 1 OPTIONAL - - 6~ -- --:11-----,t,----.-~-~.---- +5Vb ' . -...♦--------------♦---.... J: EN IC5a 45188 .____J 6 6 Q4F-----''1D 5 Q3F"-----'2 aic 14 02·"' - - - -1 .:ie I~ L a 15 CK 1x21on 7a b 14 6b C 13 4 C !.,.: 1 16 LE RSI 1 3 E~o Q3 13 IC5b Q2 12 117 g' g 16 10 g J~ Q4 14 IC6 45138 Q1F3' - - - - -7'-IA RST 47 JRST r IC7 4513B a 15 7x270n 7a b 14 6b C 13 4 C 12 di-:-=---¥,Yr--:=td e 11 ,... 1e LfJW:G Q111 CK LE RBI CD ERROR ANALYSER AUGUST 19 91 69 the CD player's decoder circuitry, which is usually +5V DC. The circuit only draws about 20mA from the CD player, the bulk of which drives the LED in an optocoupled Triac, or a reed relay coil (more on this soon). A lOOmA fuse (Fl) protects the CD player from any cable faults. Inductor Ll and the associated 33µF capacitor form a filter to reduce interference from the crystal oscillator circuits in the player. Satellite board signals The display board carries the 7-segment LED readouts & the two overflow indicator LEDs. Note that the prototype included the optional extra circuitry to obtain a 6-digit readout for the interpolation display. machine are given later in this s~ries. Now refer to the circuit diagram which is quite large but relatively uncomplicated - see Fig.2 . It consists of an input conditioner, gating network, counters and power supply. Input conditioner board Most chipsets are fabricated with MOS technology (CDl is NMOS) which isn't capabte of driving the reactive load of a multicore cable. Thus, an input conditioning board is used to act as a line driver/buffer. IC8 is an LM339 quad high speed quad comparator with open collector (0/C) outputs. Each comparator section is used in an exclusive OR gate mode. This is done by connecting the 70 SILICON CHIP inverting or non-inverting input to a reference voltage which is fixed at half the supply voltage (ie, +2 .5V for 5V logic), while the other input is connected to specified logic lines in the CD player. By swapping the connections to the two input pins, the comparator can be used as an inverting or a non-inverting buffer so it can be set to suit normally high or normally low data signals as inputs. This means that if configured correctly, the signals leaving the conditioning board will be the same for all players regardless of which chipset is used. The conditioner PC board connects to the same regulated DC supply as Four control line connections are made from the CD player to the satellite board. The first is the HFD line which indicates that a dropout has occurred. The HFD line is connected to comparator IC8d and sent to pin 6 ofIClb (on the main board). If pin 5 of IClb is high, the HFD pulse will be fed via NAND gate IClb to pin 12 ofIC3 , a 4-digit counter. Hence we have a count of the dropouts as they occur. Similarly, the UNEC line indicates that an interpolation has occurred. It is connected to comparator IC8d and sent to pin 9 of IClc on the main board. From there it goes to pin 12 of IC4, another 4-digit counter. This gives a count of the interpolations. The third control line is FCO which is connected to comparator IC8b . When the player is in the stop mode, this line is high, and it goes low during the startup procedure. At the end of a disc, it returns high. The high to low transition only occurs during the initial starting up of a disc from stationary. When it does so, pin 1 ofICBb pulls low. This momentarily pulls the input to ICld low (via the O.lµF capacitor), causing the output (pin 11) ofICld to go high. This resets all the counters to zero and clears the overflow latches, IC2a-d. So the counters are automatically reset when a disc is started up from the stop mode. The fourth and last control line is MUTE. Having a MUTE line is very convenient because as the laser skips across tracks during search operations, gross errors occur in the audio data stream. In fact , the Cl and C2 error syndrome generators in the CD player literally go berserk. This would overflow the counters very rapidly but since these errors aren't 'fault' errors, we use the MUTE line to disable the counters , since MUTE is activated when the CD 's microprocessor expects errors to occur. IC8c buffers the line and on MUTE being activated, it enables Ql to turn on. This pulls pin 5 of ICl b and pin 8 of IClc low, thus preventing these gates from passing through HFD and UNEC pulses to counters IC3 and IC4. So all pulses actually registered by the counters will be valid dropouts or interpolations. Counters There were several options to choose from for the counters. Single digit CMOS counters are cheap but take up a lot of space on the PC board. Multiplexed devices are more compact but are also more expensive. I decided to use National Semiconductor's MM74C926 4-digit counter. This device contains the whole works for a 4-digit multiplexed counter and only needs segment resistors and display driver transistors as external components. The counters are RESET by a high on pin 13. They are incremented by negative-going pulses applied to their pin 12s. When the count reaches 9999, the next clock pulse sets the CARRY output, pin 14, from high to low which toggles the two RS flipflops comprised of the 4093 quad NANO gate package, IC2. Overflow indication ICla is a square wave generator which turns Q4 on and off at a frequency of about lHz. When a CARRY signal appears at the output of IC3 or IC4, the associated RS flipflop (IC2a,2b or IC2c,2d) toggles and turns on Q2 or Q3. This allows the pulsing voltage from the collector of transistor Q4 to pass a current through overflow LED 1 or LED 2 so they will blink. When the reset line from pin 11 of ICld goes high and clears the counters, the CARRY outputs go low. If the counter is in the range 6000-9999, CARRY will be high, so if RESET occurs here, CARRY will be forced low and thus toggle the RS flipflops. However, as the RESET line goes low, the 0. lµF capacitor on pins 1 & 13 of IC2 couples through a brief negative pulse which again toggles the flipflops , thus overcoming the problem. 5 or 6-digit display If a 5 or 6-digit display is desired, the additional components shown at PARTS LIST 1 12V centre-tapped mains transformer (Farnell Cat. 178-369, see text) 1 neutral gray acrylic filter (Farnell Cat 178-186) 1 instrument case, 180 x 230 x 40mm (Jaycar Cat. HB-5915) 1 PC board, code SC01405911 1 PC board, code SC01405912 1 PC board, code SC01405913 1 47µH inductor (L 1) 1 100mA M205 quick blow fuse 2 M205 PC fuse clips 4 PC stakes 2 32-way & 2 20-way machined pin header strips, or 100 Molex pins 4 18-pin DIL IC sockets 1 16-pin DIL IC sockets 2 14-pin DIL IC sockets 1 4-way right angle 0.1-inch pin launcher (Jaycar Cat. HM3214) 3 8-way right angle 0.1-inch pin launchers (Jaycar Cat. HM3215) 1 PC-mounting heatsink (DSE Cat. H-3490) 2 rubber grommets 2 cable clamps 4 rubber feet 1 7-pin DIN plug & socket 1 500mm-length of rainbow cable 1 240VAC plug & cable 1 1-metre length of 6-core shielded cable Semiconductors 2 4093B quad NANO Schmitt trigger gates (IC1 ,IC2) the bottom righthand corner of the circuit are used. The chips involved are a 4518 dual BCD up counter (IC5) and two 4513 BCD to 7-segment decoder/drivers (IC6 & IC7). The CARRY output of IC4 is used to clock pin 2 of IC5a. The '8' output of IC5a is then used to clock pin 10 of counter IC5b. The '8 ' outputs of both IC5a (pin 6) or IC5b (pin 14) are used to generate an overflow pulse for a 5 or 6-digit readout respectively, and a link on the main PC board is placed in one of three holes to determine the number of digits. The BCD outputs go to IC6 and IC7, the 4513 BCD to 7- 2 74C926 4-digit decade counters (IC3,IC4) 1 45188 dual BCD up counter (IC5; optional) 2 4513B ?-segment decoder/ drivers (IC6,IC7; optional) 1 LM339 quad comparator (IC8) 1 MOC3041 zero-crossing optocoupled Triac (OC1) 1 7805 +5V voltage regulator (REG1) 11 BC338 NPN transistors (01 -3, 05-12) 1 BC328 PNP transistor (04) 10 1N4004 diodes (D1-9,D13) 10 LTS547AG 0.52-inch green?segment common cathode LED displays 2 3mm green LEDs (LED 1 ,2) Capacitors 1 1000µF 25VW PC electrolytic 4 47µF 16VW PC electrolytics 1 33µF 10VW PC electrolytics 1 22µF 16VW PC electrolytics 2 10µF 16VW PC electrolytics 1 10µF 16VW tantalum 3 1µF 16VW tantalum 5 0.1 µF metallised polyester (greencap) Resistors (0.25W, 5%) 1 820k.Q 4 1k.Q 1 56k.Q 2 560.Q 15 10k.Q 14 270.Q 1 5.6k.Q 14 100.Q 1 2.2k.Q Miscellaneous Spacers, screws & nuts , tinned copper wire , solder, heatsink compound, adhesive labelling . segment decoder/ drivers, which directly drive the LED displays through 270.Q current limiting resistors, one for each segment. Why did we use 4513s instead of 4511 , 4543 , 4056 or 4026s? The 4543 , 4026 and 4056 have high sink capabilities but poor source currents at 5V, so they would need a bank of driver transistors to match the drive currents of the 74C926. The 4511 has the drive but doesn't put the tails on a 6 or 9 so it displays them as a. 'b' and 'q' respectively. The 4513, however, gives full 6's and 9's at up to. 20mA at 5V and so is the ideal choice. A UGUST 1991 71 Most of the circuitry is mounted on two PC boards which are soldered together at right angles, while a third interface board mounts inside the CD player. Full construction details will be published next month, together with the interfacing details for players using Philips chipsets. The LED displays used in the prototype are Litton LTS547 AG 's, a green common-cathode, high intensity 0.52inch unit sourced from Adilam Electronics. Hewlett Packard has a comparable but more expensive device, the HDSP5603. Priced midway is the Senior SEC5612 which is available from Panel Parts. Green displays were used because most CD players have a blue-green fluorescent display, so the CDEA will complement it. Red displays such as FND500, LTS547 AP or HDSP5303 can be used but will have a reduced brightness and in any case , red displays look less attractive. Power supply To make thc'1)roject as universal as · possible, there are several power supply options available. The recommended way is a small PCB-mounted 5VA transformer from Farnell Electronics , as shown on the circuit dia72 SILICON CHIP gram. A +5V DC rail comes from the CD player via fuse F1 to drive the LED in OC1, a MOC3041 zero-vo ltage switching optocoupled Triac. When the CD player is turned on, a 20mA current flows through F1 and the LED in OC1. This turns on the Triac, thus supplying 240VAC to the transformer primary. RX1 limits the current from the CD player's power supp ly and the associated 10µF capacitor bypasses transients. (For RX1, use 1500 for +5V, 3300 for +9V and 4700 for +12V). So we have an on/off power control slaved from the CD player's power supp ly. The MOC3041 keeps the mains supply well away from the CD player's circuits. The dual 6V secondaries are connected via diodes D8 and D9 which form a fullwave rectifier to feed a 1000µF filter capacitor. This supplies a 3-terminal regulator, REG1, to provide a +5V DC supply to the circuit. There are numerous bypass capacitors placed strategically around the PC board as well. Alternatively, you may wish to power the unit from a freestanding transformer or a plugpack (AC or DC). The PC board has the facilities to take any of these, using either a fullwave bridge (single winding) or fullwave centre-tapped (or dual secondaries) format. A miniature reed relay is used to switch the secondary current because we are only switching low voltages and an optocoupler can't be used. Resistor RX2 is used to feed the miniature reed relay's coil. If the CD player's control voltage is +5V, the resistor is not required. For a voltage of +9V, the resistor is 3900 and for +12V, 6800. Next month, we shall complete the presentation of the CD error analyser and show how to connect it to typical CD players. SC • Stud. I.E. Aust; Dept. of Electronic and Computer Engineering , James Cook University, Townsville.