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THE ISD1016
VOICE RECORDER IC
IC Data
Using new techniques, Information Storage
Devices in the US has designed a 16-second
voice recorder on a single chip. It stores an
analog signal directly in an internal EEPROM,
making battery back-up redundant.
can forget about long battery life in
portable devices. Second, the memory
is volatile – if the power is removed,
the recording is lost.
The EEPROM advantage
By DARREN YATES
During the last few years, quite a lot
has happened to the way we record
and store sound. In addition to the
new hifi digital tape formats, digital
recorder ICs have also slowly begun to
take off as their advantages in certain
applications are recognised.
The obvious advantage is that
digital recorder ICs have no moving
parts. The motors, gears, heads and
tape of the conven
tional machines
are replaced with clock oscillators,
A/D converters and dynamic RAM
(DRAM). Result – greater reliability
and much reduced power consumption.
However, at this stage, solid state
recorders cannot compete with tape
machines (either analog or digital) in
terms of sound quality or recording
length. For example, it would require
one 256K x 8 DRAM chip for every
second of CD quality stereo sound.
INTERNAL
CLOCK
ANA OUT
MIC
MIC REF
AGC
AMP
The digital storage technique uses
A/D converters to sample the audio
waveform and the resulting binary
numbers, representing the sampled
values, are then stored away in
DRAMs. Similar A/D converter techniques are used in CDs and digital
audio tape recorders, except of course
the storage medium differs.
When the audio is to be recovered,
the binary numbers are fed into a
digital-to-analog converter (DAC)
and the output filtered to recover the
original waveform. But although dynamic RAMs are cheap, fast and easily
available, they do have a few bugbears.
First, they are power hungry so you
Block diagram
ANALOG
TRANSCEIVERS
ANTIALIASING
FILTER
PREAMP
Digital storage
SAMPLING
CLOCK
TIMING
DECODERS
ANA IN
That said, the solid state devices
have real benefits in applications
where you only need voice quality
recordings.
SMOOTHING
FILTER
SP+
MUX
AMP
128K CELL
NONVOLATILE
ANALOG STORAGE
ARRAY
SP-
AGC
POWER
CONDITIONING
VCCA
+5V
VCCD
+5V
ADDRESS BUFFERS
DEVICE CONTROL
A0 A1 A2 A3 A4 A5 A6 A7 TEST
(CLK)
PD P/R CE EOM
AUX
IN
Fig.1: block diagram of the ISD1000A chip family. The devices store the audio
signal in an internal EEPROM that retains memory when the power is switched
off. Other features include cascading & multiple message address options.
26 Silicon Chip
That’s where we come to the ISD1016A Single Chip Voice Record/
Playback device from Information
Storage Devices. Released in early
1992, this IC differs from other solid-state devices in that it stores the
sampled waveform in analog form.
And in
stead of storing the data in
volatile dynamic RAM, it stores it in
a non-volatile EEPROM (Electrically
Erasable Programmable Read-Only
Memory) that’s built right into the
chip.
The main advantages of this technique are better sound quality and
the fact that the recording is retained
in memory even when the power is
turned off. And because the information is stored in the EEPROM in analog
form, there’s no need for A/D and D/A
converters.
Actually, the ISD1016A is just one
of three voice recorder chips from Information Storage Devices. The other
two devices are the ISD1012A and the
ISD1020A and these have recording/
playback durations of 12 seconds and
20 seconds respectively.
Let’s take a closer look at how the ISD1016A IC works – see Fig.1. This device combines both digital and analog
electronics on the one chip, as well as
a 128,000-cell EEPROM array – enough
for 16 seconds of telephone-quality
audio. It comes in a 28-pin DIL or PLCC
package and runs off a 5V rail.
Starting at the input, audio can be
fed in from either a dynamic or electret
microphone to a preamplifier stage, or
it can come from a line level output;
eg, from a CD player or tape deck. The
gain of the microphone preamplifier
is controlled by an automat
ic gain
control (AGC) circuit. This makes
recording an easy task, as there are no
recording levels to set.
The preamplifier output is coupled
into the main input amplifier (via the
ANA OUT & ANA IN terminals) and
this in turn drives an anti-aliasing
filter. This filter is a hefty 5th order
Chebychev design which cuts all frequencies above approximately 40% of
the sampling frequency. This is done to
eliminate any mixing effects between
the input frequency and the sampling
frequency.
In this IC, the sampling rate is 8kHz
and the audio frequency cutoff point is
3.4kHz. Following the filter, the audio
signal is sampled and stored in the
128K cell EEPROM. This is where the
new technology is involved.
Because analog techniques are used,
the information storage density is eight
times that of a conventional digital
system. This eliminates the need to use
data compression or fancy algorithms
to get the physical size down.
What happens is that each cell forms
part of a closed loop which includes
a comparator. A sample-and-hold
circuit applies the analog voltage to be
stored to one input of the comparator.
The other input is connected to the
cell itself. The cell is then “pumped
up” using programming pulses until
its voltage is the same as the analog
voltage from the sample-and-hold
circuit. When the two voltages are
equal, the comparator shuts down the
programming pulses.
The magnitude of these programming pulses sets the resolution and
hence the clarity of the recording. In
the ISD1016A, there are approximately
256 levels and this translates into 8-bit
resolution.
In operation, it takes a fair amount of
time to store a sample in the EEPROM
array – about 10 milliseconds, in fact.
And since we are taking a sample every
125 microseconds, we must either lose
some information or find some way of
temporarily storing it.
To overcome this problem, the ISD1016A has two rows of 80 sample
and hold circuits. One row records
the input in real time in serial mode,
while the other row is connected in
parallel to program multiple cells in
the EEPROM simultaneously. By using
this arrangement, the IC can sample
every 125µs and still take 10ms to
program the multiple EEPROM cells
without losing data.
TABLE 1: PIN FUNCTIONS
Pin
Pin No.
Function
A0-A5
1-6
Address
A6-A7
9,10
Address
VCCD
28
VCC Digital Power
Supply
VCCA
16
VCC Analog Power
Supply
VSSD
12
VSS Digital Ground
VSSA
13
VSS Analog Ground
SP+
14
Speaker Output +
SP-
15
Speaker Output -
Test (CLK)
26
Test – Must Be Tied
Low
Aux In
11
Auxiliary Input
Ana Out
21
Analog Output
Ana In
20
Analog Input
AGC
19
Automatic Gain Control
Mic
17
Microphone Input
Mic Ref
18
Microphone Reference
PD
24
Power Diwb
P/R
27
Playback/Record
EOM
25
End-of-Message
CE
23
Chip Enable
The 128,000 cells in the EEPROM
are arranged into 160 rows of 800,
each row corresponding to 0.1s of
storage. Each row can be individually
addressed as a starting point, allowing
the device to broken up into 160 separate “phrases”.
The starting address of a recording
is set by applying an 8-bit code to
external address pins A0-A7. When
the recording is stopped, an End-OfMessage (EOM) marker is inserted
to mark the end of the message.
Playback can then be initiated from
the relevant addressed location and
continues until the EOM marker is
encountered.
In practice, this means that several short messages (or even single
words) could be stored in the chip
and accessed at will. The device could
therefore be used to play back single
word instructions in response to user
inputs, or even to construct entire
phrases under software control.
For example, the device could be
used to provide voice annotation in
test equipment, microwave ovens,
vending machines and toys, to name
just a few applications.
Longer recordings
An internal clock provides the timing signals for the sample and hold
circuits. This clock is accurate to ±2%
over the specified temperature and
voltage range to ensure good speech
fidelity. If greater accuracy is required,
the chip can be externally clocked via
its test (CLK) pin.
Playback
During playback, the signal is
clocked out of the EEPROM array and
passed through a smoothing filter. This
filter removes the sampling frequency
content of the signal and drives a
multiplexer stage, which selects either
the output from the EEPROM array or
signal fed in from an auxiliary input.
From there, the signal is fed to an audio
amplifier which can provide 50mW
into a 16-ohm load. An 8-ohm loudspeaker can also be used, provided a
10Ω resistor is installed in series with
one of the output leads.
Multiple message options
One useful feature of the chip is its
ability to play back one of many individual message stored in the EEPROM,
or to repeat a message continuously or
at set intervals.
One problem with DRAM designs
is that the main sound chip can only
address so much RAM – usually 1MB
at most – and this severely limits the
maximum recording time. However,
unlike its digital counterparts, the ISD10XX series overcomes this problem
by providing a simple cascading facility to obtain longer recording times.
Cascading four ISD1016 devices, for
example, will give up to 64 seconds
of speech, while 10 devices will provide a recording time of 2 minutes 40
seconds.
Finally, the ISD1016 also has a number of control inputs which can be programmed using external switches or
logic circuitry (eg, a microcontroller).
These include chip enable (CE-bar),
playback/record (P/R-bar) and power
down (PD). Pulling the PD pin high
when the unit is not recording or
playing back switches the unit into a
low-power standby mode to reduce the
operating current from 25mA <at> 5VDC
to less than 1µA.
Further information on the ISD
1016A voice recorder IC is available
from R & D Electronics, PO Box 179,
Springvale, 3171. Phone (03) 558 0444
SC
or (02) 712 3855.
July 1993 27
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