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Dual diversity tuner for FM microphones; Pt.1 Plagued by signal dropouts from FM wireless microphones? This Dual Diversity Tuner automatically selects the best signal from two antennas to ensure a drop-out free reception. By JOHN CLARKE FM wireless microphones are now commonly used for stage and public address work. They have the obvious benefit of allowing the performers (or speaker) to roam about the stage without being tied to a microphone cord. In its most basic form, an FM wireless microphone setup consists of a small FM transmitter (to transmit the signal from the microphone), a receiving antenna and a companion FM receiver. The receiver picks up the signals from the transmitter and feeds the demodulated signal to the stage amplifier or PA system. At least, that’s the way it’s supposed to work in theory. Unfortunately, this type of system is often plagued by bursts of noise due to signal drop-outs 40  Silicon Chip as the performer moves about on stage. That’s because the received signal strength can vary quite markedly as the wireless microphone moves from one position to another. These signal strength variations are caused both by ob­ structions in the signal path between the transmitter and the receiving antenna and by nulls due to signal reflections from various objects in the room. The most obvious sources of obstruc­tion are the performers’ bodies and other on-stage objects, with metallic objects causing the greatest problems (depending on size). Careful siting of the receiving antenna can help to mini­ mise this problem but the results are often far from satisfac­tory. The best way to dramatically improve reception is to use two receiving antennas which are separated by several wave­lengths. In this situation, the signal is usually good in at least one antenna and, by using a receiver which can automatical­ly choose the best signal, good reception can be maintained for virtually 100% of the time. This type of tuner is called a “diversity tuner”. While commercial diversity tuners are available, they are generally quite expensive. As a result, this design should appeal to those capable of building their own equipment. It will cost considerably less than a commercial unit but provides similar performance. The design is also easy to build and requires no special equipment for alignment, so you shouldn’t have any problems on that score. It can be used with any standard wireless microphone which operates in the commercial FM band (88-108MHz); eg, the microphone FM transmitter published in SILICON CHIP in October 1993. Alternatively, you can use one of the readily-available commercial FM wire­­less microphones. As can be seen in the photographs, the circuitry is housed in a slimline rack mounting case. On the front panel are a 10-LED signal strength bargraph, two LED indicators to show the active antenna (either A or B), a test switch to enable manual selection of either antenna, an audio level output control, and a power switch. The rear panel carries two 75Ω PAL sockets for the anten­nas, an RCA output socket (audio out) and a fuseholder. The audio output connects to your mixer or power amplifier. Performance Fig.1 and the accompanying specifications panel show that the FM tuner is an excellent performer. As shown, the sensitivity is very good, with -3dB limiting occurring with an input RF level of just 1.3µV, while the signal-to-noise ratio reaches 60dB at just 7µV input and is an excellent 75dB at 100µV. These figures ensure a good-quality, low-noise signal for a wide range of RF signal inputs. Note that the signal meter levels are useful for showing the relative noise level from the FM tuner. At level 5, the tuner has reached ultimate quieting (75dB), while at signal level 2, the signal to noise ratio is 60dB. At level 10, the AGC is coming into effect to prevent overload. While this tuner performs equally as well as a commercial hifi tuner, it differs in that it requires two antennas and has fixed tuning. And, of course, it only provides for mono recep­tion. The two antennas connect to the tuner via shielded RF cables and should be mounted several wavelengths apart. If the signal from the wireless microphone deteriorates in the active receiving antenna, the tuner automatically switches to the other antenna in an effort to maintain signal quality. It does this according to one of three modes of operation. • The first mode occurs when a good signal is always available from at least one antenna. In this mode, the tuner only switches between the two antennas when the signal level in the active antenna drops below a preset threshold. Provided that the signal level in the active antenna is above this threshold, then this antenna remains selected regardless of their relative signal strengths. If, however, the signal strength in the active antenna drops below the threshold, the second antenna is selected. This antenna now remains selected until its signal drops below the threshold, at which point the first antenna is selected again, and so the process continues. The preset threshold, by the way, is the signal strength at which the signal-to-noise ratio has reached its maximum. Fairly obviously, it is unnecessary to switch antennas in this situation. • The second mode of operation occurs when both antennas provide signal strengths below the threshold. In this situation, the tuner selects the antenna that provides the best signal strength but that’s not all it does. At intervals of about one second, it also briefly switches to the other antenna to check its signal strength. If it’s lower than the active antenna, it quickly switches back again but if it’s higher, it stays there and briefly monitors the previous antenna at regular intervals. This constant switching between antennas does cause a slight distur- Main Features • • • • • • • • • • • • • • Dual antenna inputs Fixed tuning – can be set anywhere in FM broadcast band (88-108MHz) Low distortion Excellent signal-to-noise ratio High sensitivity Typical open air range of 60 metres with dipole antennas 10-LED bargraph display for signal strength indication Active antenna indicator LEDs Test switch to manually select alternative antenna (useful for setting up) Adjustable audio level output AGC to prevent overloading of tuner input Three modes of antenna switching to minimise antenna switching disturbances Automatic muting if poor signals received from both antennas to minimise noise 50µs de-emphasis (can be easily altered to 75µs) August 1994  41 10 +10 AUDIO 9 -10 8 -20 7 -30 6 -40 5 MUTE THRESHOLD -50 4 -60 3 -70 2 -80 -90 AGC SET POINT 1 'S' METER AUDIO OUTPUT (dB) 0 10 100 RF LEVEL AT 98MHz (uV) 1k 1 0 10k Fig.1: this graph shows the performance of the FM tuner front end. The sensitivity is very good, with -3dB limiting occurring at an RF input level of just 1.3µV, while the signal-to-noise ratio reaches 60dB at just 7µV input & is an excellent 75dB at 100µV. ANTENNA 'A' FM TUNER ANTENNA 'B' IF OUTPUT 'A' SIGNAL STRENGTH DECISION CIRCUIT SIGNAL STRENGTH FM TUNER CONTROL COMBINER IF DEMODULATOR AUDIO OUTPUT IF OUTPUT 'B' TRADITIONAL DUAL DIVERSITY TUNER Fig.2: most dual diversity tuners use two FM tuner front ends to receive signals from separate antennas. The signal strength in each tuner is monitored by a decision circuit & this controls a combiner circuit so that the best signal from the FM tuner outputs is fed through to the demodulator. This scheme works well but the need for two FM tuner stages adds to the cost. ANTENNA 'A' FM TUNER ANTENNA 'B' IF DEMODULATOR AUDIO OUTPUT SIGNAL STRENGTH ANTENNA SWITCH CONTROL DECISION CIRCUIT SILICON CHIP DUAL DIVERSITY TUNER Fig.3: the SILICON CHIP Dual Diversity Tuner differs from the traditional approach by using a single FM tuner stage & an antenna switch to select between the two antennas. In this case, the decision circuit monitors the signal strength in the FM tuner & controls the antenna switch to ensure that the best signal is selected. 42  Silicon Chip bance in the audio signal but this is barely notice­able, particularly as the signal is already down in the noise. Of course, if the signal strength in one antenna rises above the threshold, then the tuner will maintain selection of that antenna until the signal drops again. • The third mode of operation occurs when the signal strength is very poor from both antennas. In this case, the audio is muted to prevent noise. The tuner then continuously assesses the signal strength in each antenna and, when one rises above the preset minimum, it immediately locks onto that antenna and re­leases the muting. Normally, the first mode is the one that operates since, with correct antenna arrangement, the signal can be expected to be good in at least one antenna virtually all of the time. Under these circumstances, the switching action will be inaudible. If due care is taken with antenna siting, the second and third modes should operate rarely (if at all). Basic arrangement Fig.2 shows the traditional arrangement of a dual diversity tuner. It uses two receiving antennas, with each antenna feeding a separate FM tuner. The signal strength from each tuner is monitored by a decision circuit which then controls a combiner stage. ANTENNA 'A' SIGNAL LEVEL AGC CONTROL IC1 ANTENNA 'B' AUDIO ANTENNA SWITCHER D1-D4 IF FILTER T2, X1 MIXER IC1 Q1 RF AMPLIFIER IF FILTER X2 IC1 IF AMPLIFIER AND LIMITER 10.7MHz IF AMPLIFIER LOCAL OSCILLATOR IC1, T1, D5 IC1 DEMODULATOR IC2, L10 AUDIO OUT MUTE IC7 AMPLIFIER IC6, VR3 AFC CONTROL MUTE COMPARATOR IC5a, VR2 'A' 'B' SIGNAL LEVEL INDICATORS LED11, LED12, IC8e,IC8f BUFFER IC4a LED1 LED10 VREF CONTROL MINIMUM SIGNAL COMPARATOR IC5b, VR3 ANTENNA R SWITCHING OSCILLATOR IC9 CE D-A CK CONVERTER IC11 R SIGNAL LEVEL INDICATOR IC3 ANTENNA SWITCHING LATCH IC10a MANUAL IC10b, S2 '0' OUT R TIMER IC12 Fig.4: this is the complete block diagram of the SILICON CHIP Dual Diversity Tuner. The signal level generated by the IF amplifier stage in the FM tuner (top of diagram) is monitored by comparators IC5a & IC5b & these then control the antenna switching logic (IC9-IC12). There are various ways of combining the IF signals from the two tuners. One way is to simply select the largest signal, while another method involves adding the two outputs together. A third method involves adding the outputs according to a weighting determined by the signal-to-noise ratio of each IF signal. The first method is the easiest and is the one most commonly used. Following the combiner stage, the resulting IF signal is demodulated to produce an audio output. The main drawback of this approach is that it requires two tuners and this adds to the cost. It also presents problems as far as the design is concerned, since each tuner must be able to lock onto the signal without being affected by the other’s local oscillator. This problem is usually cured by shielding each tuner in a separate metal case or by using a common local oscillator. By contrast, the SILICON CHIP Dual Diversity Tuner uses an entirely different approach that makes do with just one FM tuner stage – see Fig.3. In this design, the signals from the two antennas are fed to the tuner via an antenna switch. Only one antenna is selected at a time and a decision circuit, which monitors the signal strength from the FM tuner, selects the antenna which will provide the best results. The main advantage of this approach is that it eliminates the second tuner, thereby reducing the cost and simplifying construction. Only a few extra parts are needed for the antenna switch, although the decision circuit is slightly more complicat­ed than in the previous case. Block diagram Refer now to Fig.4 – this shows the full block diagram for the Dual Diversity Tuner. The antenna switch, FM tuner and demod­ulator make up the top half of the diagram, while the decision circuit occupies the bottom half. The antenna switcher uses low capacitance VHF diodes D1-D4 to switch the antennas and the selected antenna signal is ampli­fied by tuned RF amplifier stage Q1. This amplifier has AGC (automatic gain control) applied to it, the AGC level being set by the signal level from IF amplifier stage IC1 and by the signal level from the output of the RF amplifier itself. Nominally, the AGC only comes into effect when the RF signal is greater than 10mV. Its job is to prevent overload by reducing the gain of the RF amplifier at high signal levels. Following the RF amplifier, the signal is fed to balanced mixer stage IC1 where it is mixed with the local oscillator signal. This local oscillator stage (IC1, T1 & D5) operates at a frequency that’s nominally 10.7MHz below the RF signal. As a result, the mixer stage converts the incoming RF signal to a 10.7MHz FM signal (plus other sum and difference sign­als). This 10.7MHz signal is now filtered (T2, X1), amplified and filtered again August 1994  43 44  Silicon Chip .01 .01 D1 BA482 .01 .033 220k 3.3k 10  2.2k 2.2k .01 +12V 2.7k K A 7 14 6 5 6 8 K 4  7 4 4.7k 10  2.2k L4 L5 X2 10.7MHz .01 2.7k 0.1 IF AMPLIFIER AND DEMODULATOR 0.1 2.2k D4 BA482 .01 .01 ANTENNA B D3 BA482 IC8f .01 A IC4a LM358 2.7k 3  +12V .01 L3 .01 ANTENNA A LED11 RED TP1 IC8e 74C14 5 .01 ANTENNA B LED12 GREEN L1 L2 D2 .01 BA482 ANTENNA A 2 3 L6 10  8 IC5b LM393 0.1 0.1 300W 0.1 .01 1 47 16VW 16 17 15 2 1 390  10k 0.1 L10 IC2 TDA1576 4 560pF 1 6 750  L8 27pF 6 13 IC8a 5 7 ANTENNA SWITCHING TIMER 12 0.1 4 33pF 10  5V 11 SIG 12 14 METER ZERO VR1 10k 33pF 3 .01 S .001 .001 G1 D L7 Q1 BF981 .001 G2 +12V .001 10  .001 10  0.1 1.2M 220k VC1 8.550pF RF PREAMPLIFIER +12V 8 13 10 1 IC9 7555 18 2 22k .018 6 3 .001 10  IC8b 3.9k 0.33 3 2 11 10 11 10 5 5 4V REF 9 LO OUT 6 13 14 16 0.1 T1 6 15pF MIXER AND IF FILTER 2 3 4 4 47  3 390pF X1 10.7MHz 3.9pF 390pF 5 1 T2 D5 BB119 33pF 2 .01 .01 100k 10  1 8 16  D7 1N4148 1.5k 1.5k 17 18 7   10k 6   14 13  2 12  4 11  3 5 ANTENNA SWITCHING OUTPUT 1 D IC10aQ 4013 2 CK Q S R 6 4  10 SIGNAL STRENGTH METER IC3 LM3914 15  3 9 0.1 LED LED LED LED LED LED LED LED LED LED 82  1 2 3 4 5 6 7 8 9 10 5W 11 10 12 D6 1N4148 4 17 7 LO AGC 8 IN IC1 TDA1574 15 18 AGC OUT 1.8pF 6.8pF 6.8pF 100k 220k 220k .01 10  +12V .01 VC2 530pF .0068 8 9 33pF L9 33pF +12V +12V +12V I GO ANTENNA UPDATE TIMER 2 3 1 0 1 22k D-A CONVERTER 4.7k IN 0V 47 16VW 4 S1 CASE E N 240VAC F1 250mA A 10 10k 10k 10k 10k +12V 6.3V T1 M2852 10k 7 5 6 IC6b 8 7 220k 1 0.1 220k 4 IC7 4066 12 14 10 11 6.3V 2 47k D9-D12 4x1N4004 OUTPUT LEVEL VR4 100k 47pF IC6a LF353 3 6 IC5a 7 10k 4700 25VW 10 1 MUTE THRESHOLD VR2 10k +12V 5 330k +12V GND REG1 7812 AUDIO OUTPUT MINIMUM SIGNAL LEVEL VR3 10k 1 OUT 10k +12V 4 27k 33k 2 2 3 7 39k 2 IC4b 3 47k 56k 10 1 4 5 IC8c 8 IC11 4017 13 CE 4 1 IC12 R 7555 8 +12V 15 R 16 CK 14 10k 10k 2 10 100k 10k 6 3 +12V 0.1 D8 1N4148 D8 1N4048 9 DUAL DIVERSITY FM TUNER IC8d 0.1 8 S2 ANTENNA TEST 10k 10k D A K G2 VIEWED ON LABEL SIDE S D CK 11 9 R Q IC10b S 10 8 G1 7 12 0.1 14 (X2), after which it is applied to a limiter stage. The limiter restricts the signal level applied to the following demodulator stage (IC2, L10) and also improves the signal-to-noise ratio. The demodulator converts the FM IF signal into an audio signal and provides an automatic frequency control (AFC) line to the local oscillator. This line is used to control the local oscillator so that it always oscillates at a frequency that’s exactly 10.7MHz less than the tuned RF signal. Let’s return now to the IF amplifier/ limiter stage. As well as driving the demodulator, this stage also provides a signal level output and this is applied to the signal level indicator (IC3) and to buffer stage IC4a. As previously mentioned, the signal level indicator drives a 10-LED bargraph. Buffer stage IC4a drives the following mute comparator and minimum signal comparator stages (IC5a and IC5b, respectively). In operation, the mute comparator compares the signal level with a reference voltage and controls the mute circuit (IC7) at the output of the demodulator. When the signal level is very low (which would result in considerable noise in the audio output), the mute comparator activates the muting circuit so that no signal is fed to amplifier stage IC6. The minimum signal comparator (IC5b) compares the signal level from IC4a with a voltage set by a D-A converter (IC11). When a high signal level is applied to IC5b, the antenna switch­ing oscillator (IC9) is off and the output of the D-A converter is at a maximum. However, if the signal level drops below the output from the D-A converter, IC5b’s output toggles and releases the reset on the antenna switching oscillator. This oscillator now starts Fig.5 (left): the final circuit uses low capacitance VHF diodes D1-D4 to switch the antenna outputs to RF amplifier stage Q1. IC1 & IC2 form the heart of the FM tuner, while IC3 & LEDs 1-10 form the signal strength meter. Depending on the signal strength, comparator IC5b controls the antenna switching latch (IC10) via IC9 to select the appropriate antenna. IC5b & IC7 mute the audio output if the signals from both antennas fall below a preset threshold. August 1994  45 Specifications Preset frequency range ������������������������������������� 88-108MHz Audio output at 75kHz deviation ������������������������ 620mV RMS to 1.7V RMS (adjust­able) Frequency response into 4.7kΩ load ���������������� -0.4dB at 20Hz and 15kHz Signal-to-noise ratio at 75kHz deviation ������������ 75dB for >100µV RF input Total harmonic distortion at 50kHz deviation ����� Better than 0.15% at 1kHz De-emphasis ����������������������������������������������������� 50µs (75µs optional) RF input at -3dB before limiting (98MHz) ���������� 1.3µV RMS AM rejection ������������������������������������������������������ Typically 54dB (1kHz, 30% AM modulation) Isolation between antennas ������������������������������ 27dB Antenna switching response time ���������������������� <100µs and clocks the antenna switching latch (IC10a) to select the alternative antenna. If the signal from this antenna is suffi­ciently high (ie, above the level from the D-A converter), IC5b immediately resets the switch­ing oscillator so that the antenna selection is maintained. However, if the signal from both antennas is low, the antenna switching oscillator remains on and the two antennas (A & B) are alternatively switched in and out by IC10a at a rapid rate. During this time, the switching oscillator also clocks the D-A converter, which reduces its output voltage on each clock cycle. When this voltage eventually drops below the signal level, IC5b stops the antenna switching oscillator and IC10a latches the currently selected antenna. At this point, timer IC12 is activated and, after about 1s, resets the D-A converter so that its output is again at maximum. As previously described, the minimum signal comparator (IC5b) now compares the D-A output with the signal voltage and so the above process is repeated indefinitely. Finally, a manual switching circuit (IC10b and S2) enables either antenna to be selected at the press of a switch. Each time S2 is pressed, the alternative antenna is selected and this selection can be maintained by holding the switch in. This is a useful feature for testing and setting-up purposes, since it enables the antennas to be sited for best signal strength. Circuit details Fig.5 shows the final circuit of the Dual Diversity Tuner. It uses 12 ICs, 46  Silicon Chip a dual gate Mosfet (Q1), several coils and nu­merous minor components to perform all the functions described above. Despite the apparent complexity of the FM tuner from the block diagram, it really is quite straightforward. It’s based on a Philips chip set consisting of two ICs (IC1 and IC2) and these only require the addition of suitable coils, a varicap tuning diode and sundry minor parts to give a basic high-quality mono­phonic FM tuner. IC1, a TDA1574 Integrated FM Tuner IC, forms the front end of the tuner. It contains a balanced mixer, local oscillator, linear IF amplifier and AGC circuitry. Its companion, IC2 (a TDA1576 FM IF Limiter), provides a limiting IF amplifier, a quadra­ture demodulator, AFC output and field strength indicator output. An RF amplifier based on dual-gate Mosfet Q1 increases the sensitivity by about 28dB. The signal for the RF amplifier is supplied from either antenna A or antenna B via the antenna switcher. Let’s take a closer look at how this switcher works. Diodes D1-D4, along with coils L1-L4, form the basis of the antenna switcher. D1-D4 are actually Philips Silicon Planar Diodes. These have a very low capacitance of 0.65pF at a reverse voltage of 12V, and a forward resistance of about 0.6Ω at a for­ward current of 5mA. These specifications are for 100-200MHz operation, which makes them ideal for switching FM broadcast band antennas. The DC control lines for the antenna switcher are driven by the Q and Q-bar outputs of flipflop IC10a via 10Ω resistors. For example, when Q is at +12V, Q-bar is at ground. D2 is thus for­ward biased via its 2.2kΩ anode resistor and L2, while D4 is forward biased via L4 and its 2.2kΩ cathode resistor. At the same time, D1 and D3 are reverse biased at +12V and are therefore non-conducting. In this situation, the signal from antenna A can pass via D2 and the associated .01µF capacitors to the input of the RF amplifier at L5. The signal from antenna B, however, is blocked by diode D3 and is instead shunted to ground via D4 to ensure maximum isolation from the RF amplifier input. Conversely, when Q-bar of IC10a switches to +12V and Q goes to ground, the situation is reversed. D1 and D3 are now forward biased, while D2 and D4 are reverse biased. The signal from antenna B is now coupled to the RF amplifier input (via D3), while the signal from antenna A is blocked by D2 and shunted to ground via D1. Note that all the diodes are AC-coupled using .01µF capaci­tors. This is done to isolate the DC voltages which switch the diodes from the antenna. Inductors L1-L4 complete the DC paths through the diodes; they act as short circuits at DC but provide a high impedance at 100MHz to avoid loading the antenna signals. The signal from the antenna switcher is amplified by the RF preamplifier stage, as described previously. This stage consists of dual-gate VHF Mosfet Q1 and inductors L5-L7. L5 inductively couples the signal to L6 which forms a tuned circuit with trimmer capacitor VC1. VC1 is adjusted to tune the circuit to the wireless microphone frequency, so that out-of-band fre­ quencies are rejected. The signal at the bottom of L6 is AC-coupled to ground via a .01µF capacitor, while the top end of L6 connects to gate G1 of Q1. This gate is DC biased to 4V from pin 5 of IC1 via a 220kΩ resistor which also serves to dampen the very high Q of the L6-VC1 resonant circuit. Note that this line is decoupled using a .001µF feedthrough capacitor, two .01µF capacitors and a 10Ω resistor, to shunt any RF signal to ground. Gate G2 of Q1 is used as the AGC input and the control voltage is derived from the AGC output (pin 18) of IC1 via a 10Ω resistor. The .001µF Most of the parts for the Dual Diversity Tuner are installed on two PC boards: a main board & a much smaller board which holds the RF amplifier components. The full assembly details will be published in Pt.2. feedthrough capacitor and .001µF capacitor on either side of the resistor ensure that RF signal is not fed back to the AGC pin of IC1. Normally, the voltage on G2 is about 10V and this biases Q1 so that it provides full gain. However, at very high signal levels, the AGC voltage goes down. When it drops below 8V, the gain of Q1 is reduced by about 6dB/volt. Q1 is connected in a common source configuration with the amplified signal appearing at its drain. The quiescent current through Q1 is set by a 390Ω source resistor and this is bypassed by a .001µF capacitor to ensure maximum AC gain. The supply to Q1 (via L7) is filtered using a 10Ω resistor and .001µF feedthrough capacitor. The amplified RF signal is fed to L8 via a 27pF capacitor. L8 then inductively couples this signal into a tuned circuit consisting of L9, two 33pF capacitors and trimmer VC2. A 220kΩ resistor is connected in parallel with VC2 to damp out the high Q of the LC resonance, to make the circuit easier to align. Balanced mixer Following this tuned circuit, the signal is AC-coupled to the balanced mixer inputs of IC1 (pins 1 & 2). In addition, some of the signal is coupled via a 1.8pF capacitor to pin 3, which is the wideband input for the AGC circuit. The local oscillator inputs are at pins 7 and 8 of IC1, while the output appears at pin 6. Its frequency is set by the tuned circuit formed by the primary winding of local oscillator coil T1 (pins 4 & 6), the associated 15pF and 33pF capacitors, and varicap diode D5. The capacitance of D5 is set by a control voltage from the AFC (automatic frequency control) output of IC2. Feedback for the local oscillator is developed via the secondary winding between pins 2 and 3 of T1. Note that the dots on pins 2 and 4 indicate the winding phase required to obtain oscilla­tion. Pins 16 and 17 of IC1 are the balanced mixer outputs and these are fed to the primary winding of IF transformer T2. This winding and the two associated 390pF capacitors form a 10.7MHz tuned circuit, while the centre tap of the winding connects to the +12V supply to provide a load for the open collector outputs of the mixer. The secondary of T2, at pins 4 and 5, drives 10.7MHz ceramic filter (X1) via a 47Ω resistor. This resistor, together with the impedance of T2’s secondary, provides the correct 300Ω load for the ceramic filter. Following X1, the signal is fed to the IF amplifier input at pin 14 of IC1. The output from this stage then appears at pin 10 and is further filtered by 10.7MHz ceramic filter X2 before being coupled to pin 15 of IC2. Limiting & demodulation IC2 includes a 4-stage limiter amplifier which amplifies the signal from X2 and limits the signal once it reaches about 30µV at the pin 15 input. The limiter amplifier also provides a signal strength output voltage at pin 13 and this voltage is fed to the to the AGC input (pin 12) of IC1. IC1 monitors both this narrowband signal level and the wideband signal level at pin 3 and initiates AGC at its pin 18 output whenever the signal level exceeds a predetermined level. Following the limiter amplifier, the signal is converted to an audio signal using a quadrature demodulator. Inductor L10 across pins 4 and 6 forms the quadrature coil and this is driven from pins 3 and 7 via 33pF capacitors. The 560pF capacitor across the quad­ rature coil provides tuning, while the parallel 750Ω resistor damps the Q to ensure minimum distortion in the recov­ered audio signal. The resulting audio outputs appear at pins 8 and 9 of IC2 and are identical except that they are 180 degrees out of phase. Note that a .0068µF capacitor is wired between pin 8 and 9 to provide the required 50µs de-emphasis, to compensate for the pre-emphasis in the wireless microphone. If the wireless microphone has a 75µs pre-emphasis, this capacitor should be changed to .01µF. August 1994  47 Both audio outputs have a DC offset of 5.5-9.8V, the exact value depending on the frequency of the local oscillator. As previously mentioned, the DC output at pin 9 is used to provide AFC for the local oscillator by applying the offset voltage to varicap diode D5. This voltage is applied to D5 via two series 100kΩ resistors, while the associated 0.33µF and .01µF capacitors filter out unwanted RF and audio signals from this line. As well as driving the AGC input of IC1, the signal strength voltage at pin 13 of IC2 is also fed to pin 5 of IC3, an LM3914 linear dot/bar LED driver. This device, in company with a 10-LED bargraph display, forms the signal strength meter. Inside IC3 is a string of 10 comparators and a voltage reference. As the signal level rises, these internal comparators progressively switch their outputs low to light the corresponding LEDs. The two 1.5kΩ resistors set the LED brightness and the display range. Note that the supply to IC3 is decoupled using a 0.1µF capacitor, while the supply to the LEDs is decoupled using a 10µF capacitor and an 82Ω 5W resistor. This resistor ensures that most of the power dissipation takes place outside the IC so that its ratings are not exceeded. Audio muting The signal strength voltage at pin 13 of IC2 is also fil­tered using a 3.3kΩ resistor and a .033µF capacitor and applied to unity gain op amp IC4a. The output from this buffer stage then drives pin 5 of mute threshold comparator IC5a and pin 3 of minimum signal level comparator IC5b. IC5a compares the signal level on its pin 5 input with a preset voltage from VR2. In practice, VR2 is set so that the output from IC5b is normally high. This high output closes CMOS analog switch IC7 so that the audio signal from pin 8 of IC2 is fed to IC6a. However, if the signal level falls below the threshold set by VR2, pin 7 of IC5a goes low and IC7 opens to mute the audio signal. IC6a is the output audio amplifier. It is wired in non-inverting mode and its gain can be varied from 5.7 to 15.7 using VR4. The 47pF capacitor in the feedback path reduces high frequency noise in the audio output. Pin 2 of IC6a is biased at half supply 48  Silicon Chip using buffer stage IC6b. This stage is itself biased at half supply using two 10kΩ resistors, while the 10µF capacitor at the non-inverting input provides decoupling. Antenna switching IC5b (the minimum signal level comparator) has two control functions. First, it controls the clock enable (CE) input of D-A converter IC11. Second, it controls antenna switching oscillator IC9 via inverter IC8a. If the signal level on pin 3 of IC5b is greater than the level set by VR3 on pin 2, pin 1 of the comparator will be high. IC9’s reset input will thus be low and so this oscillator (a 7555 timer) will be off. At the same time, the high on CE of IC11 will also prevent clocking of this counter. In practice, this means that the currently selected antenna will be maintained. However, if the signal level drops below the threshold set by VR3, IC5b’s output switches low and releases the reset on IC9. When this happens, pin 3 of IC9 immediately goes high and clocks IC10a, a 4013 D-type flipflop, which toggles its Q and Q-bar outputs. These outputs, in turn, control the antenna switcher (D1-D4) in the manner described previously. They also drive inverter stages IC8e and IC8f which activate the antenna LED indicators (LEDs 11 & 12) to show which antenna has been select­ed. If the signal level from the new antenna is now higher than the reference voltage set by VR3, IC5b’s output immediately goes high again and IC9 is held reset to maintain the selection. However, if the signal level is lower than the threshold, IC9 will continue clocking IC10a and so the antennas will be alter­nately switched at about 2.8kHz (ie, once about every 360µs). Each time an antenna is selected, IC9 clocks decade counter IC11 via inverter IC8b (ie, IC11 is clocked at 2.8kHz). As shown on Fig.5, IC11’s “0” to “5” outputs are connected to resistors which range in value from 22kΩ up to 56kΩ. IC11 and its associated resistors form the D-A converter. Initially, output “0” of IC11 is high and the maximum voltage is applied to pin 3 of IC4b. As the counter now counts up, this voltage steps down as each output goes high in turn, finally reducing to 0V when output “6” (not shown) goes high (since outputs “0” to “5” are now all low). This voltage remains at 0V when outputs “7”, “8” and “9” go high. IC4b amplifies the applied voltage by about three times and provides a buffered output for VR3. As the voltage falls, it is continually compared by IC5b against the incoming signal level (selected from each antenna in turn), until it falls below the signal level. At this point, IC5b’s output goes high again, IC9 is held reset and the current antenna is held. IC11 also stops counting due to the high on its CE input (pin 13). In this way, the circuit selects the antenna with the high­est signal strength. Counter reset IC12, together with inverters IC8c and Ic8d, is used to reset the counter (IC11). As soon as the “0” output of IC11 goes low (ie, on the first clock cycle from IC9), pin 2 of IC8c goes high and releases the reset on oscillator stage IC12. Pin 3 of IC12 now goes high for about 1s and then switches low again. This low is inverted by IC8d and applied to the reset input (pin 15) of IC11 via a 0.1µF capacitor. IC11’s “0” output now immediately switches high again and so IC12 is once again held reset via IC8c (ie, pin 3 of IC12 remains low). Diode D8 protects the reset input of IC11 by clamp­ing this input to ground when the output of IC8d goes low. At this point (ie, following reset), the output from the D-A converter is at its maximum and so the threshold voltage set by VR3 is also at maximum. IC5b now compares the signal strength from the selected antenna against this new threshold and so the selection process begins again. Manual antenna switching IC10b is the other half of the 4013 dual-D flipflop. It basically operates as a debouncing circuit for the antenna test switch (S2). Each time S2 is pressed (ie, pin 10 is pulled high), Q-bar toggles high and clocks IC10a via isolating diode D7 to select the alternative antenna. This antenna selection is maintained while ever the switch is held down. When the switch is released, Q-bar of IC10 goes low again and the circuit returns to normal mode. Power for the circuit is derived from the mains via a 12.6V transformer. This secondary AC voltage is rectified PARTS LIST 1 1-unit high black anodised rackmounting case with screen printed front & rear panels 1 PC board, code 06307941, 207 x 161mm 1 PC board, code 06307942, 28 x 49mm 2 pieces of blank single-sided PC board, 53 x 15mm 2 pieces of blank single-sided PC board, 38mm x 15mm 1 piece of blank single-sided PC board, 38 x 12mm 1 Altronics M-2852 12.6V 3.78VA mains transformer 1 DPST illuminated rocker switch with red Neon indicator (S1), Altronics Cat. S-3217 or equivalent 1 M205 safety fuse holder (F1) 1 M205 250mA fuse 1 TO-220 mini U heatsink, 26 x 30 x 12mm 1 100kΩ log pot (VR4) 1 16mm OD black anodised knob 1 SPDT momentary pushbutton switch (S2) 2 insulated panel mount PAL sockets 1 insulated RCA panel socket 4 rubber feet 6 cable ties 17 PC stakes 1 solder lug 4 5mm standoffs 6 2mm screws & nuts for panel sockets 4 3mm screws & nuts for standoffs 3 4mm screws & nuts to secure mains transformer & earth solder lug 1 3mm star washer for earth solder lug 3 10kΩ horizontal trimpots (VR1VR3) 1 700mm length of 0.8mm tinned copper wire 1 400mm length of 0.6mm enamelled copper wire (ECW) 1 250mm length of 0.5mm ECW 1 200mm length of 0.25mm ECW 1 piece of large diameter heatshrink tubing (to insulate contacts of S1 and F1) Coils and filters 4 balun formers, Philips 4313 020 4003 1 (L1-L4) 3 Neosid type ‘A’ adjustable inductance assemblies, type # 99-007-96 (base, former, can & F29 screw core) (T1,T2 & L10) 2 matched Murata SFE10.7ML 10.7MHz ceramic filters (X1,X2) Wire & cable 1 7.5A mains cord & plug 1 300mm length of 3-way rainbow cable 1 400mm length of single core shielded audio cable Semiconductors 1 10-segment LED bargraph (LEDs1-10) 1 3mm red LED (LED11) 1 3mm green LED (LED12) 1 TDA1574 Integrated FM Tuner (IC1) 1 TDA1576 FM/IF Amplifier (IC2) 1 LM3914 linear LED dot/ bargraph driver (IC3) 1 LM358 dual op amp (IC4) 1 LM393 dual comparator (IC5) 1 LF351 dual op amp (IC6) 1 4066 quad CMOS analog switch (IC7) 1 74C14, 40106 hex Schmitt trigger (IC8) 2 7555, LMC555CN CMOS timers (IC9,IC12) 1 4013 dual D-flipflop (IC10) 1 4017 decade counter decoder (IC11) 1 7812 1A 12V 3-terminal regulator (REG1) 1 BF981 dual gate Mosfet (Q1) 4 BA482 low capacitance VHF silicon planar diodes (D1-D4) 1 BB119 VHF varicap diode (D5) 3 1N4148, 1N914 switching diodes (D6-D8) 4 1N4004 1A rectifier diodes (D9D12) using diodes D9-D12 and filtered with a 4700µF capacitor to derive an 18V (approx.) DC rail. A 3-terminal regulator (REG1) then provides a stable +12V supply for the circuitry. The 47µF capacitor at the output of the regulator is in­cluded to ensure regulator stability. Capacitors 1 4700µF 25VW PC electrolytic 2 47µF 16VW PC electrolytic 4 10µF 16VW PC electrolytic 1 1µF 16VW PC electrolytic 1 0.33µF MKT polyester 5 0.1µF ceramic 9 0.1µF MKT polyester 1 .033µF MKT polyester 1 .018µF MKT polyester 19 .01µF ceramic 1 .0068µF MKT polyester for 50µs de-emphasis (use .01µF for 75µs) 2 .001µF ceramic 4 .001µF feedthrough ceramic 1 560pF ceramic 2 390pF ceramic 1 47pF ceramic 5 33pF NPO ceramic 1 27pF NPO ceramic 1 15pF NPO ceramic 2 6.8pF NPO ceramic 1 3.9pF NPO ceramic 1 1.8pF NPO ceramic 1 8.5-50pF miniature trimmer capacitor (VC1), Altronics Cat. R-4009 Green 1 5-30pF miniature trimmer capacitor (VC2), Altronics Cat. R-4007 Yellow Resistors (0.25W, 1%) 1 1.2MΩ 1 3.9kΩ 1 330kΩ 1 3.3kΩ 6 220kΩ 3 2.7kΩ 3 100kΩ 4 2.2kΩ 1 56kΩ 2 1.5kΩ 2 47kΩ 1 750Ω 1 39kΩ 1 390Ω 1 33kΩ 1 300Ω 1 27kΩ 1 47Ω 2 22kΩ 9 10Ω 10 10kΩ 1 82Ω 5W 2 4.7kΩ Miscellaneous 1 plastic alignment tool (to adjust slugs & trim­mer capacitors) 1 plastic tuning wand with a brass screw on one end and an F29 ferrite slug on the other (joined by plastic tubing – see Pt.2). That completes the circuit description. Next month, we will continue with the complete construction and SC alignment details. August 1994  49