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SPE FEA CIAL PRO TURE JEC T DOLBY PRO-LOGIC SURROUND SOUND DECODER; PT.1 By JOHN CLARKE Now you can have the big sound of the movies in your living room with this Dolby* Pro Logic Surround Sound Decoder. This is the genuine article, approved & licensed by Dolby Labora­tories in California. In the October 1994 issue, we featured a preview article on Dolby Surround Sound and now, as promised, we present the Dolby Surround Sound Decoder. We believe that this is the world’s first do-it-yourself Dolby Surround Sound Decoder to be described in an electronics magazine. This has been made possible by a great deal of cooperation between SILICON CHIP 18  Silicon Chip and Jaycar Electronics. SILICON CHIP has produced the design while Jaycar have been responsible for the licensing of the design (necessary if kits are to be made available with Dolby decoder chips) and for a considerable amount of liaison with Dolby Laboratories. Our particular thanks to Bruce Routley of Jaycar Electronics for helping make it all happen. To keep costs as low as possible, this Surround Sound Decoder has no built-in amplifiers. It has four audio outputs, two to drive the front speakers in a conventional stereo setup, one to drive the centre-front channel and one to drive the rear speakers. Most readers will already have an existing stereo system so they will need another three power amplifiers and three loudspeakers. Alternatively, if you elect to use the “phantom mode” for the centre front channel (ie, centre channel simulated with the stereo speakers), you can get away with just an addi­tional stereo amplifier to drive the rear speakers. The Surround Sound Decoder is housed in a compact plastic case INPUTS LEFT + AUTOMATIC BALANCE IC1 SELECTOR IC1 RIGHT + DOLBY PROLOGIC ADAPTIVE MATRIX IC1 LEFT +10dB VOLUME CONTROL IC3 RIGHT CENTRE +10dB SURROUND NOISE SEQUENCER IC1 ANTIALIAS FILTER IC2 20ms DELAY IC2 7kHz LOW PASS FILTER IC1 MODIFIED DOLBY BTYPE NOISE REDUCTION UNIT IC1 Fig.1: this is the block diagram of the Surround Sound Decoder. Virtually all the circuit functions are provided by IC1 (a Dolby Pro Logic decoder chip) & by IC2 (a digital delay chip). measuring 255 x 80 x 180mm. On the front panel are the on/off switch, noise sequencer switch, channel selector, the centre and surround trim controls and the volume control. As well, there are 3-position switches for mode and centre channel selection. At the rear are the RCA sockets for the left and right inputs, and the left, right, centre and surround outputs. The noise sequencer is an aid in setting up the balance between the channels. When switched on, a noise signal is sent to the selected channel. By selecting each channel in turn, the centre and surround channel outputs can be adjusted to match the sound levels from the left and right channels. Balance between the left and right channels is set using the balance control on the stereo amplifier. The mode switch selects stereo, 3-stereo or surround sound. Stereo selection simply passes the stereo input signals through to the output without processing. The 3-stereo position adds in the centre channel, while the surround position processes the input signals to provide the centre and surround channels. The centre switch allows selection of Normal, Phantom and Wideband signal for the centre channel. The Normal setting is for loudspeakers which do not have bass response below 100Hz; it has a low frequency rolloff below about 100Hz. The bass signals from the centre channel are not lost though, since they are added equally to the left and right channels at a -3dB level so that the overall bass response is correct. As you might expect, Phantom gives a pseudo centre chan­ nel, with the centre signal being produced by the left and right loudspeakers. Finally, the Wideband setting is used if you have a full-range loudspeaker for the centre channel. Block diagram Fig.1 shows the block diagram for the Surround Sound Decoder. Virtually all the circuit functions are provided by IC1 and IC2. The left and right channel encoded signals are initially processed by the automatic balance circuit. This detects any difference between the left and right channel signal levels and adjusts the gain until the difference is nulled out. Precise balance between the left and right channels is important for obtaining the best separation between each of the four chan­nels. The selector block provides switching between the signal output from the automatic balance circuit and the noise sequenc­er. When the noise sequencer is selected, a white noise signal is passed through to the Left, Centre, Right or Surround outputs. The Dolby Pro Logic Adaptive Matrix is the heart of the decoder. This • • • • • • • • OUTPUTS LEFT Features Genuine Dolby Pro Logic surround sound decoding Meets all Dolby specifications Stereo, 3-stereo or surround selection Normal, wideband (full range) or phantom centre channel Noise sequencer to set up balance between channels Trim controls for centre and surround channels Master volume control for all channels Line outputs for each channel RIGHT CENTRE TRIM 0dB-+20dB CENTRE SURROUND TRIM 0dB-+20dB SURROUND was shown in detail on page 8 of the October 1994 issue. The surround signal output from the adaptive matrix is sent to an anti-aliasing filter (IC2) before being fed through the 20ms delay circuit. Following the delay, the surround signal is passed through a 7kHz low pass filter and then a modi­ fied Dolby B-type noise reduction circuit to suppress high fre­quency noise. The resulting surround sound signal now passes to the main volume control which handles all four channels simultaneously. The left and right outputs are then amplified by a factor of three (+10dB), while the centre and surround outputs are ampli­fied by a factor of zero to 10 times, depending on the setting of the trim controls. As can be seen from Fig.1, most of the functions of the decoder are provided in IC1, a Mitsubishi M69032P Dolby Pro Logic Surround Decoder. Its internal block diagram is shown in Fig.2. Apart from all its signal processing features, it provides a +4V DC reference at its pins 43 & 44 and this is used for biasing some of its other pins, as detailed later in this arti­cle. Fig.3 shows the internal diagram of the M65830P digital delay chip. It uses adaptive delta modulation (ADM) in its anal­og-to-digital converter and stores the signal in its 16K bit memory. After the preset delay, the digital signal is read out from the memory and converted back to an analog signal. The length of delay can be controlled via the REQ, SCK and DATA inputs at pins 4, 5 & 6 respectively. Depending on the signals on these pins, the delay can be set anywhere between 0.5ms and 32ms. However, to keep the circuit as simple as possi­ ble, we used the standard fixed delay of 20ms. Circuit description Now let’s have a look at the complete circuit which is shown in Fig.4. This December 1994  19 L R C S RECT RECT RECT RECT OUT OUT OUT OUT 3 2 1 56 LRECT 8 TC RRECT11 TC CRECT 5 TC SRECT 4 TC LBPF 6 OUT LBPF 7 IN RBPF 10 IN RBPF 9 OUT LPF 48 +IN LPF 47 -IN VCS VLR VCS VLR VCS VLR TC1 TC1 TC2 TC2 TC3 TC3 53 54 52 55 51 50 MODIFIED DOLBY-BTYPE NR DECODER CENTRE MODE CENTRE MODE CNT CNT 36 31 30 4x COMBINING NETWORKS 2x POLARITY SPLITTERS L+R L-R 1 S' OUT 39 29 2x DUAL TIME CONSTANT AND THRESHOLD SWITCHES 2x LOG DIFFERENCE AMPLIFIERS 4x FULL-WAVE RECTIFIERS NR NR NR NR IN TC WT VCF 42 49 45 41 OPERATION AND CENTRE MODE CONTROL 34 L+R OUT 33 38 8x VCA 37 43 1 40 46 LPF OUT AUTOBALANCE SERVO AUTOBALANCE VCA AUTOBALANCE VCA NOISE SEQUENCER NOISE SEQUENCER 13 14 AB AB GATE HOLD TC 15 16 L AB L AB IN OUT 22 21 R AB R AB IN OUT 26 27 28 NOISE NOISE NOISE REF HPF LPF 24 25 23 NOISE NOISE NOISE CNTA CNTB CNTE Fig.2: this block diagram shows the internal circuitry of the M69032P Pro Logic surround sound decoder IC. This complex chip processes the incoming audio inputs & determines which signals require subsequent directional enhancement. comprises five ICs, two regulators, five diodes, four reed relays and numerous capacitors and resistors. As noted above, IC1 and IC2 do most of the work. The left and right channel inputs are applied to pins 15 & 22 (AB in) of IC1 via 10µF capacitors and 10Ω resis­tors. A 22kΩ resistor at each pin biases the inputs to +4V, while the 10Ω resistors prevent high frequency instability. The auto-balance (AB) circuit adjusts the gain of its left and right channel voltage controlled amplifiers as discussed above. The auto-balance time constant is at pin 14 and consists LPF1 IN 23 LPF1 OUT 22 OP1 OUT 21 of a 10µF low leakage capacitor with a 10MΩ discharge resistor across it. This long time constant prevents the auto-balance circuit from modulating the audio signal. The outputs from the left and right buffers (pins 18 & 19) connect internally to the VCA circuitry and to bandpass filters (at pins 6 & 7 and pins 9 & 10 respectively) which roll off frequencies above 5kHz and below 200Hz. The signals are then applied to the full wave rectifier circuitry and the L+R and L-R networks. Output filter capacitors for the full wave rectifiers on each Left, Right, OP1 IN 20 CC1 18 OP2 IN 16 CC2 17 4.7k LPF1 1 4.7k LPF2 MODULATOR 13 LPF2 OUT DEMODULATOR OP1 OP2 REF19 24 VCC D1 DO0 DO1 MO MAIN CONTROL 0.5VCC RESET CLOCK MI DELC 1 VDD 16K BIT SRAM 11 12 AUTO RESET OSCILLATOR 2 XIN 20  Silicon Chip 3 XOUT DELAY TIME CONTROL 4 REQ 5 SCK 6 DATA 7 IDSW 8 IDFLAG 9 TEST1 10 TEST2 C OUT VCC VREF VREF IREF 19 R BUFF OUT 12 GND 18 20 L R IN BUFF OUT Centre and Surround channel connect to pins 3, 2, 1 and 56 respectively. The Rectifier Time Constant (RTC) capacitors within the log difference amplifiers for these chan­nels are at pins, 8, 11, 5 and 4. Finally, time constant capaci­tors which control the rate at which the sounds can move from one channel to another are at pins 50-55. The rate control time constants are important since they prevent the system from plac­ing sounds in the incorrect channel if subject to sudden tran­sients or loss of signal due to dropouts. The external noise sequencer components are at pins 26, 27 and 28. The noise is filtered with a bandpass filter so that the output signal is centred around 500Hz. S2a selects the noise when pin 23 is tied to ground. LED 2 OP2 LPF2 OUT IN 15 14 COMP 17 L IN 1 R OUT 32 L OUT 44 7kHz LPF S OUT 35 L-R OUT DGND AGND Fig.3: internal diagram of the M65830P digital delay chip. It uses adaptive delta modulation (ADM) in its anal­og-to-digital converter & stores the signal in a 16K bit memory. After the preset delay, the digital signal is read out from the memory and converted back to an analog signal. SPECIFICATIONS Dolby Requirement Performance of Prototype Freqeuncy Response -3dB <at> 50Hz & 15kHz L & R channels; -3dB <at> 50Hz & 6-8kHz S channel; -3dB <at> 50Hz & 15kHz wideband C channel; -3dB <at> 90-140Hz & 15kHz wideband C channel -3dB <at> 14Hz & 40kHz; -3dB <at> 17Hz & 7.2kHz; -3dB <at> 16Hz & 40kHz with C trim centred; -3dB <at> 110Hz & 40kHz with C trim centred Signal to Noise Ratio (wrt reference & 100mV at C output) 65dB CCIR/ARM, C & R channels; 65dB CCIR/ARM S channel 700dB unweighted Distortion <1% <at> 300mV in & 1kHz .05% R, L & C outputs; 0.15% S output Headroom 15dB above reference R, C, L & S channels 17dB S output; 17.5dB R, C & L outputs Input Sensitivity <350mV RMS 300mV RMS Crosstalk 25dB minimum between channels L-R 44dB; C-L or C-R 30dB; S-L, R or C 37dB Volume Tracking within 3dB over top 40dB range between R, C, L & S outputs <0.2dB to -70dB; <1dB to -80dB S Channel Delay 20ms fixed or 15-30ms adjustable 20ms fixed Auto Balance Between L & R Inputs 27dB L-R rejection ±4dB error for 27dB L-R rejection Noise Sequencer 10-15dB below reference -12dB Output Clipping 2V RMS 2V RMS Gain Trim ±10dB for C & S outputs ±10dB for C & S outputs Note: reference level is 300mV & 1kHz <at> C out (pin 30 of IC1) Most of the parts for the Surround Sound Decoder are installed on a single PC board, so the construction is relatively straightforward. Full constructional details will be provided in next month’s issue. December 1994  21 22  Silicon Chip +4V 15k 0.1 0.1 .0047 47k R BPF IN R BPF OUT 1 C RECT O/P FILTER 2 R RECT O/P FILTER 3 L RECT O/P FILTER 26 27 NOISE REF NOISE HPF 37 IC1 M69032P R BUFFER OUT R BUFFER IN R AB OUT R AB IN 14 AB HOLD TC 10 9 19 20 21 L BPF IN L BPF OUT L BUFFER OUT L BUFFER IN L AB OUT L AB IN 0.1 56 S RECT O/P FILTER 0.1 0.1 0.1 10 10M 10 LL 680pF 47k 7.5k +4V 7 10  22 680pF 22k 10 +4V 15k 0.1 6 18 17 16 10  15 7.5k +4V 22k 10 0.1 100k RIGHT INPUT LEFT INPUT 44 43 S' OUT 39 8.2k NR 49 TC 330k .047 NR 45 WT 15k 15k 10 10 10 10 0.68 .0022 NR 41 .0056 VCF LPF 46 OUT 42 NR IN LPF 47 -IN 470pF LPF 48 +IN +4V +4V 29 22k 33 22k 38 22k CENTRE 30 CONTROL 220 VREF VREF S OUT R OUT C OUT 22k L OUT 32 100 1 15k 15k 15k .0056 7.5k 14 LPF IN2 LPF OUT2 470pF 5.6k 18k 100pF X1 2MHz X OUT 22 7 LPF OUT1 23 LPF IN1 3 9 0.1 OP OUT1 10 11 12 LK1 19 47 18 0.1 17 0.1 100 6 LK3 5 LK2 4 1 24 +5V 10 8.2k 8.2k 8.2k .068 21 30  OP 20 IN1 REF CC1 CC2 DATA SCK REQ VDD VCC 1k GND IC2 M65830P 22K 16 17 VCA OUT 39k VC1 VC2 VREF 9 10 8 3 2 15 VCA VCA OUT IN 39k .068 16 OP IN2 15 OP OUT2 2 X IN 1M 470pF 18k 13 VOLUME VR1 5K LIN 2.7k 13 12 4 VCA VCA OUT IN IC3 TDA1074A VP 11 39k 10 6 7 14 VCA VCA OUT IN 100pF .0033 .0056 1 39k DECOUPLE 18 1 100 +12V 5 VCA IN +12V 10 10 8.2k 10 IC4c 180pF 15k IC4b 4 14 1 5 6 IC4d 11 180pF 7 SURROUND TRIM VR3 4.7k 50k LOG 12 13 3 2 180pF 4.7k 8 CENTRE TRIM VR2 50k LOG IC4a 10 TLO74 9 180pF 15k 47k 10 47k 10 47k 10 0.1 47k 10 RLY4 RLY3 RLY2 +12V 100k 100 100k 100  100k 100  100k RLY1 100  SURROUND OUT RIGHT OUTPUT CENTRE OUTPUT LEFT OUTPUT Q1 BC338 RLY4 B K A 3 I GO 10k 7 IC5a 5 LM358 4 K  NOISE LED2 A NOISE TEST S2a ON OFF +4V 40 12 100k IREF NOISE TEST E VLRTC 4.7 54 VCSTC 4.7 53 VLRTC 0.22 55 GND 23 31 MODE VCSTC 0.22 52 VCSTC 51 0.22 470  +5V 1 2 3 1 MODE S5 2 0.18 CENTRE 36 MODE VLRTC 50 0.22 S2b +4V ON OFF 1.8k CASE E CENTRE S4 3 10 S RTC 4 .022 C RTC 5 DOLBY PRO LOGIC SURROUND SOUND DECODER S3: 1: LEFT 2: CENTRE 3: RIGHT 4: SURROUND S4: 1: NORMAL 2: PHANTOM 3: WIDEBAND S5: 1: STEREO 2: 3-STEREO 3: SURROUND 47 25VW D4 1N4148 D3 1N4004 100 +15V 100k 1M 10k S’ output 10k 6 8 GND 22 25VW 1000 25VW 0.47 N 1 25 NOISE TEST B .022 .047 11 R RTC NOISE TEST A 8 L RTC .047 E C VIEWED FROM BELOW 22 IC5b 2 0.1 10 OUT 7812 IN REG1 D2 12V 1N4004 0V 240VAC 2 3 S3b 4 1 2 +4V A 1 10k D5 1N4004 82  100  +12V 0.1 10 GND 22 25VW 12V S1 F1 250mA E B POWER LED1 470  A K  C RLY3 RLY1 RLY2 +5V OUT 7805 REG2 IN 47  1W 47  1W D1 1N4004 T1 POWER .001 250VAC 3 4 CHANNEL SELECT 24 S3a 28 NOISE LPF 22 indicates when the noise sequenc­er is on and it is fed via S2b and a 470Ω resistor from the +5V supply rail. Channel selection for the noise source is made with switches S3a & S3b via the A and B noise test inputs at pins 24 and 25. Switch S5 is the mode selector. Note that S5 is a centre-off switch and that its position 3 connects the pin 31 mode input to +4V. Switch S4, the centre channel selector switch, is also a centre-off switch and at its positions 1 & 3, the bass response is varied by the 10µF and 0.18µF capacitors which are bypassed to earth via the 220µF filter capacitor for the +4V reference at pins 43 & 44. The output at pin 39 is labelled S’ to differentiate it from the S surround signal after the delay. The S’ output is fed to an 8.5kHz low pass anti-alias filter formed by the op amp at pins 22 & 23 of IC2 (the digital delay) and the associated resistors and capacitors. IC2 is clocked by a 2MHz crystal and this precisely sets the delay period. The two 0.1µF capacitors at pins 17 & 18 are for the delta modulation circuit in the analog-to-digital and the digital-to-analog conversion. The 30Ω resistor and the .068µF capacitor between pins 20 & 21 determine the response rate of the op amp used for delta modulation. The demodulated delayed signal is at the output of the op amp at pin 15. The .068µF capacitor between pins 15 & 16 sets the low frequency rolloff for this op amp in the demodulation pro­cess. Finally, the op amp between pins 13 and 14 is connected using the associated resistors and capacitors to form a second order 7kHz low-pass filter. Its output at pin 13 is connected to a similar 7kHz filter involving the op amp at pins 46 & 47 of IC1. So we Fig.4 (left): despite the complicated processing that takes places, the final circuit uses just five ICs. IC1 & IC2 form the heart of the circuit, while IC3 is a quad voltage controlled amplifier (VCA) which controls the signal level fed to op amp output stages IC4aIC4d. IC5a & IC5b control relays RLY1-RLY4 which mute the outputs at switch on & switch off. December 1994  23 PARTS LIST 1 PC board, code 02311941, 204 x 151mm 1 Dynamark front panel, 230 x 62mm 1 Dynamark rear panel, 106 x 50mm 1 HB-5930 Jaybox, 250 x 170 x 75mm 1 12-0-12V 15VA toroidal mains transformer (T1) 1 illuminated mains rocker switch (S1) 2 SPDT centre off switches (S4,S5) 1 DPDT toggle switch (S2) 1 2 pole 6-position rotary switch (S3) 1 2MHz crystal (X1) 1 5kΩ linear pot (VR1) 2 50kΩ log pots (VR2,VR3) 1 6-way RCA socket panel 1 3-core mains lead with moulded 3-pin plug 1 500mm length of single shielded audio cable 1 500mm length of twin shielded audio cable 1 250mm length of dual shielded audio cable 1 500mm length of 7.5A brown mains rated wire 1 250mm length of 7.5A green/ yellow mains wire 1 500mm length of red hookup wire 1 500mm length of green hookup wire 1 250mm length of yellow hookup wire 1 500mm length of 3-way rainbow cable 1 200mm length of 0.8mm tinned copper wire 1 2-way mains terminal block 1 TO-220 heatsink, 30 x 25 x 13mm 3 16mm black anodised knobs 1 22mm black anodised knob 4 5V reed relays, Jaycar Cat. SY4036 (RLY1-RLY4) 1 M205 panel mount fuse holder (F1) 1 250mA M205 fuse 6 3mm screws, nuts & star washers 1 3mm countersunk screw, nut & star washer 3 solder lugs 6 self-tapping screws for securing PC board to case 2 3mm LED bezels 10 100mm long cable ties 1 mains cord grip grommet now have a 4-pole 7kHz filter which removes any signal above 7kHz in the surround channel signal that passes to the Dolby B-type noise reduction unit within IC1. From there, the signal is internally connected to the operation and combining network circuit block. The four output channels from this combining network appear at pins 32, 38, 33 & 29, representing the left, centre, right and surround signals. Each output is AC-coupled using 10µF capacitors to pins 5, 14, 4 & 15 of IC3, a TDA1074A quad voltage controlled amplifier. It can provide a 110dB control range with 80dB separation and excellent tracking between channels. VR1, the main volume control, adjusts the voltage on pins 9 & 10 to set the gain. Pins 7, 12, 2 & 17 of IC3 are the outputs for the left, centre, right and surround channels respectively and these are AC-coupled via 10µF capacitors to quad op amp IC4. IC4a and IC4c provide a nominal 10dB of gain for the left and right chan­nels, as set 24  Silicon Chip Semiconductors 1 M69032P Mitsubishi Dolby Pro Logic decoder (IC1) 1 M65830P Mitsubishi digital delay (IC2) 1 TDA 1074A quad voltage controlled amplifier (IC3) 1 TL074 quad op amp (IC4) 1 LM358 dual op amp (IC5) 1 7812 12V 3-terminal regulator (REG1) 1 7805 5V 3-terminal regulator (REG2) 1 BC338 NPN transistor (Q1) 4 1N4004 1A 400V rectifier diodes, (D1,D2,D3,D5) 1 1N4148, 1N914 diode (D4) 2 3mm green LEDs (LED1,LED2) Capacitors 1 1000µF 25VW PC electrolytic 1 220µF 16VW PC electrolytic 4 100µF 16VW PC electrolytic 1 47µF 25VW PC electrolytic 1 47µF 16VW PC electrolytic 2 22µF 25VW PC electrolytic 2 22µF 16VW PC electrolytic 19 10µF 16VW PC electrolytic 1 10µF 16VW RBLL electrolytic 2 4.7µF 16VW PC electrolytic 2 1µF 16VW PC electrolytic 1 0.68µF MKT polyester 1 0.47µF MKT polyester 4 0.22µF MKT polyester 1 0.18µF MKT polyester 14 0.1µF MKT polyester 2 .068µF MKT polyester 3 .047µF MKT polyester 2 .022µF MKT polyester 3 .0056µF MKT polyester 1 .0047µF MKT polyester 1 .0033µF MKT polyester 1 .0022µF MKT polyester 1 .001µF 250VAC metallised paper (Wima MP3-Y or equivalent) 2 680pF ceramic 3 470pF ceramic 4 180pF ceramic 2 100pF ceramic Resistors (0.25W 1%) 1 10MΩ 1 5.6kΩ 2 1MΩ 2 4.7kΩ 1 330kΩ 1 2.7kΩ 7 100kΩ 1 1.8kΩ 6 47kΩ 1 1kΩ 4 39kΩ 2 470Ω 7 22kΩ 5 100Ω 2 18kΩ 1 82Ω 9 15kΩ 2 47Ω 1W 4 10kΩ 1 30Ω 5 8.2kΩ 2 10Ω 3 7.5kΩ Miscellaneous Heatshrink tubing, solder by the 8.2kΩ input resistors and the 15kΩ feedback resistors. The 180pF capacitor across each feedback resistor provides a high frequency rolloff at about 40kHz. The amplifiers for the centre and surround signals (IC4b & IC4d) have a variable gain of between 0dB and 20dB, as set by VR2 and VR3. Reed relays RLY1-RLY4 feed the signals to the output sockets. The reed relays are included to prevent large switch-on and switch-off thumps. At switch-on, comparator IC5a and its associated components delay the relay actuation closure until all the capacitors in the circuit have charged to their resting DC voltage. At power off, the relays open immediately to disconnect the outputs and prevent any DC shifts from being coupled into the following power ampli­fiers. IC5a is connected as an inverting Schmitt trigger and it monitors the voltage across the 100µF capacitor at pin 6. At switch-on, the 100µF capacitor begins to charge via the 100kΩ resistor from the +15V rail. Initially, the output of IC5a is high and pin 5, the non-inverting input, is held at about +9V. After about 10 seconds, pin 6 reaches the 9V threshold, causing pin 7 to switch low. The pin 5 input is now pulled to about +3V via the 10kΩ feedback resistor. This 6V of hysteresis gives a sharp Schmitt trigger action and prevents the output from dithering when the 100µF capacitor gets close to the +9V threshold. IC5b acts as an inverter for IC5a so that when IC5a’s output at pin 7 goes low, IC5b’s output goes high and turns on Q1. The reed relays now switch on. Note that each relay coil is rated at 5V *Trademarks & Program Requirements Note 1: “Dolby”, “Pro Logic” and the Double-D symbol are trade­marks of Dolby Laboratories Licensing Corporation, San Francisco, CA 941034813 USA. Note 2: this Surround Sound Decoder requires a stereo program source such as a stereo television or hifi stereo VCR. For sur­round sound, the program must be Dolby Surround encoded as indi­cated in the movie credits by the Dolby Double-D symbol. For unencoded stereo signals, the Dolby 3-stereo selection will provide the centre front channel. The decoder will not operate from a mono signal. and draws 10mA, so we have connect­­ ed two pairs of coils in series across a 10V supply. This is derived from a +15V rail via 100Ω and 82Ω dropping resistors. The 15V rail is provided by D3 and a 47µF capacitor. When power is switched off, the 47µF capacitor supplying the relays quickly discharges. This also discharges the 100µF capacitor at pin 6 of IC5a via diode D4 and the 1.8kΩ resistor. This causes IC5b to switch low and turn off Q1. As a consequence, the reed switches are de-energised and any switch-off transients are avoided. Power for the circuit is derived from a 12-0-12V toroidal transformer (T1) which is connected in a full wave centre tapped configuration to charge a 1000µF capacitor to about 15V via diodes D1 and D2. The resulting DC voltage is regulated to +12V by 3-terminal regulator REG1. This supplies power to IC1, IC3 and IC4. IC2’s supply comes from REG2, a 5V regulator fed via two 47Ω resistors from the main 15V supply. That completes the circuit description of the Surround Sound Decoder. In Pt.2 next month, we will describe the construction and testing proceSC dure. AC/DC digital clamp meter with 4000 count display and bargraph! ● High speed auto-or manual ranging ● High speed sampling for 40 segment bargraph display ● Average, Temperature test, Max hold, Peak hold functions ● Sleep mode to reduce battery con- sumption ● Continuity beeper, Data hold, Diode test and analog signal output ● Battery or AC adaptor operation Brief Specifications Functions : AC/DC current, AC/DC voltage, Ohms, Continuity, Diode test, Frequency, Temp, Data/ Peak/Max hold, Average., Analog signal output Display : LCD 3.5 digits, 4000 (Hz: 9999) count Bar Graph Display : 40 segments Ranges : Auto or manual ranging Aac, Adc : 400, 1000A Vac, Vdc : 40, 400, 650V Frequency : 10.0-999.9Hz Temperature : -50.0 to +150°C Jaw Opening : 55 mm ø or 65 x 18mm busbar Withstand Voltage: 2.5kVac, 1 minute Lloyd’s Register Quality Assurance to ISO-9001 2343 – one of the NEW Generation of Multimeters from Centrecourt D3, 25-27 Paul Street North, North Ryde Call Robyn for more information on (02) 805 0699 or fax : (02) 888 1844 December 1994  25