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Manufacturer's Data On
The ISD2590P Single-Chip
Voice Recorder IC
This second-generation series of solid-state
audio ICs from Information Storage Devices
features extended recording/playback times as
well as a new pushbutton operation mode &
lower distortion.
By DARREN YATES
Following close on the heels of the
original ISD1000 series, Information
Storage Devices has released the new
second-generation of solid state audio
devices - the ISD2500-series. The most
notable feature of the new range is that
the EPROM array has jumped in size
from 128,000 to 480,000 bits, which
has allowed the much greater recording times. The 2500-series comes in
four versions, the ISD2545, ISD2560,
ISD2575 and ISD2590 which have
45, 60, 75, and 90 seconds duration
respectively.
The frequency bandwidth for the
devices range from 4.5kHz for the 2545
down to 2.3kHz for the 2590.
Fig.1 shows the basic block diagram
of the internals of the IC. As with the
ISD1000-series, the new 2500-series
uses a patented method of storing
INTERNAL
CLOCK
ANA IN
ANA OUT
MIC
MIC REF
AGC
AMP
SAMPLING
CLOCK
TIMING
ANALOG
TRANSCEIVERS
ANTIALIASING
FILTER
DECODERS
XCLK
PREAMP
analog signals in EPROM cells. The
technique is similar to programming
an ordinary EPROM except that in
this case, the cell isn't blasted with a
high or low voltage level but in small
increments. The output of the cell is
compared with the input signal and
while the cell output is below the
sampled input, the device continues
to incrementally charge up the cell.
When the two are equal, programming
of that cell ceases.
The size of the incremental charges
is such that there are 256 possible
levels which is equivalent to a conventional 8-bit system, except that
that this method requires only 1/8th
the amount of storage elements for the
same recording time.
Looking at Fig.1, input signal is
applied either to the MIC preamp or
SMOOTHING
FILTER
SP+
MUX
AMP
480K CELL
NONVOLATILE
ANALOG STORAGE
ARRAY
SP-
AGC
POWER
CONDITIONING
VCCA
+5V
VCCD
+5V
ADDRESS BUFFERS
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
DEVICE CONTROL
OVF
PD P/R CE EOM
AUX
IN
Fig.1: block diagram of the ISD2500 series analog voice recorder IC. The device
stores the audio signal in an internal 480K EPROM that retains memory even
when the power is switched off.
10 Silicon Chip
directly to the main preamp via the
ANA IN pin. From here, the signal
undergoes automatic gain control
(AGC) to produce the optimum recording level. After this, a 5-pole
anti-aliasing filter removes the upper
frequency signals.
Transferring the signal directly
to the cells is virtually the same as
for the 1000-series with two rows
of analog transceivers (or sample &
hold circuits) which perform `parallel programming' of a given row of
cells. At present, details are sketchy
on the number of cells in each row
but the system works with one row is
receiving samples in real time while
the other is programming multiple
cells simaltaneously.
When replaying, the stored signal
passes through another 5-pole filter
to remove components of the internal
clock frequency, then fed through a
multiplexer and out through the bridge
amplifier. The internal clock does not
require any external components, but
it is also possible to use an external
clock drive which is fed into the
XCLK pin.
Faster clocking
The benefit of this is that by feeding
the device with a higher than usual
clock frequency, you can obtain some
improvement in sound quality with
corresponding sacrifice in recording
time.
However, you can't extend the
recording time by decreasing the
clock frequency. The reason is that if
the clock frequency drops below the
required level, the sampling is such
that the filters can no longer remove
the clock frequency component from
the audio making it garbled and almost
impossble to understand. Fig.2 shows
a table of the various devices and
their sampling rates, bandwidths and
required external clock inputs.
The EPROM array is divided up
Table 1
Part No.
Duration (secs)
Input Rate
Bandwidth
Required XCLCK
ISD2545
45
10.6kHz
4.5kHz
1365.3kHz
ISD2560
60
8.0kHz
3.4kHz
1024kHz
ISD2575
75
6.4kHz
2.7kHz
819.2kHz
ISD2590
90
5.33kHz
2.3kHz
682.7kHz
into 600 equal spaced sections, each
of which can be accessed via the 10
address lines, A0 through to A9 (0 to
257 hex). For the ISD2560 60-second
version, this gives a resolution of 0.1
seconds for each division, similar to
the first series.
The other addition is the new OVFbar (overflow) output. When in either
record or playback mode, this line
pulls low when the device has reach
the end of its memory, or is as full as
a boot. The benefit is that it is easy to
cascade devices together and using
this pin to control the next device in
the chain.
With regards to cascading devices,
its possible to extend the recording
time without limit. Using the EOM
(end-of-message) and OVF lines, the
first device is connected as the master
and a number of other devices connected as `slaves' or memory modules.
However, the cost of such a system is
likely to be prohibitive.
Pushbutton mode
One of the more interesting features
is the addition of a push-button mode.
This allows the device to triggered by
the rising or falling edge of signal rather than having to tie the corresponding
input high or low. The makes design
of peripheral circuitry much easier.
The mode is entered into by pulling
the two most significant address lines
high as well as the M6 mode pin. The
chip enable (CE) pin now becomes a
toggle START/PAUSE control while
the power down (PD) line is now a
STOP/RESET control. The pause feature is a very useful one as it allows
you to stop recording or playback of
a message, and then to continue on
from that spot, just as you would with
a normal tape deck.
When recording, pressing the
PAUSE key inserts an EOM (endof-message) marker at the present
memory location. When replaying,
each time, the IC comes across the
EOM marker, it pauses at that memory
location. Pressing the START/PAUSE
key will cause the IC to begin playing
the next message starting at the next
memory location.
This is ideal for example if you have
five commands which explain how a
piece of machinery should be used.
At the end of each command, the user
has to press the START/PAUSE key to
hear the next command. The pause
prevents the user from hearing all
five commands at once and possibly
making errors.
Message looping
There are many applications where
you would record a message into the
device and then have it continuously
loop, playing the message continuously. Examples of this would be answering machines, in-store advertising, etc.
By pulling the M3/A3 address line
high, the device enters the Message
Looping mode. It is activated when
the Chip Enable (CE) line is pulled
low. This continous looping continues
until the CE line is pulled low again
at which time the current mode and
address lines are looked at and the
corresponding mode executed.
The ISD2500-series are still fabricated in the same 28-pin DIL package
but are also available in SOIC, TSOP
and bare die formats. In addition,
theses devices are also avilable in a
low-voltage range (3.6-4.0V).
The total harmonic distortion for
all devices is quoted as 1% <at> 1kHz
and the output power amplifier can
supply 50mW into 16W. If using an 8W
speaker, a 10W 0.25W resistor should
be placed in series.
The output stage is a bridge amplifier with both anti-phase signals appearing at pins 14 and 15. To connect
the device to an external amplifier,
a series capacitor and 10kW resistor
or pot should be connected to one
of the outputs while the other is left
floating. Connecting either output to
ground will more than likely destroy
the output stage. See the project based
on the ISD2590P on page 16 for an
SC
example of this.
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February 1994 11
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