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Command Control Decoder For Model Railways This decoder circuit takes a different approach to the design featured in our May 1998 issue. Instead of feeding switched power to the locomotive motor, it feeds smooth DC which is better for some motors, including coreless types. Not only does this circuit use less components but it ends up on a much smaller PC board. Design by CAM FLETCHER Our series on Command Control for model railways, which was presented in the January to June 1998 issues of SILICON CHIP, has created quite a deal of interest. While there were some initial problems with the supply of ZN409CE servo decoder chips, these have been overcome for the present 40  Silicon Chip and so quite a few systems have been built. As always though, someone can see a better way or anoth­er approach and so it is with this alternative decoder design which feeds smooth DC to the motor and also manages to dispense with the need for the ZN409CE de- coder. While achieving this result, the circuit also manages to use less components and is accommodated on a smaller PC board. As a result, it could be fitted into some N-scale locos as well as smaller bodied British OO or HO-scale locos. Before we describe what this circuit does, we should brief­ly review the function of the original decoder circuit featured in the May 1998 issue of SILICON CHIP. This was installed inside a typical HO or larger scale locomotive and was fed with track voltage of about 11V DC with a superimposed 5.9V pulse waveform. The pulse waveform consisted of blocks of 16 pulses sepa­rated by a sync “pause” and the width of each pulse contained the speed and direction of each locomotive on the 16-channel system. Ergo, a maximum of 16 loco- motives could be simultaneously con­trolled on the system. The decoder circuitry extracts the particular pulse from the block of 16 pulses and then that pulse is decoded to drive a H-bridge transistor circuit which drives the locomotive motor. The locomotive can be driven at any speed up to its maximum, in forward or reverse direction. The H-bridge feeds voltage and current to the motor in switching mode at a pulse rate of about 100Hz. To fully understand the decoder operation and hence the differences between it and the circuit described here, you will need to read the May 1998 article in detail. The pulsed mode of operation is fine for most locomotive motors and has the big advantage that the driving transistors stay cool and do not require any heatsinks. However some model railway enthusiasts prefer not to run their locomotives with pulsed power. The switchmode operation can lead to noticeable armature and gear-train noise and vibration, especially at low speeds and it can cause heating problems in some coreless motors which are popular with British model railway enthusiasts. This alternative decoder design uses just three ICs and four TO-126 power transistors for the motor drive. The transis­tors need to be mounted on the locomotive body, chassis block, ballast weight or other suitable heatsink to dissipate the heat produced because the transistors operate in linear mode rather than switchmode. Ideally, the current drawn by the locomotive will be around 0.1A or less, to minimise this power dissipation. If efficient can motors are used, this small current drain is certainly achievable. Fig.1 shows the circuit diagram. There are few similarities between it and the circuit of the original decoder published in May 1998 although the principle of operation is broadly the same, as far as recovery of pulses is concerned. From then on, the decoding of the recovered pulse is quite different. As already noted, the track voltage is a 5.9V train of pulses Fig.1: IC1 and IC2 extract the channel pulse from the 16-channel block while IC3a, Q2, D5 & D6 produce a DC output which is pro­portional to the pulse width. IC3c & IC3d provide the forward/reverse decoding. February 1999  41 Fig.2: the decoder has the resistors and other small components mounted vertically to save space. The board for the output tran­sistors is optional as the transistors do require some heatsinking. Note the link under IC1. Fig.3: this is the artwork for the two PC boards, shown twice actual size. Note that we have used small pads for the ICs, to allow tracks to run between pins. superimposed on 11V DC. This is fed to a bridge rectifier consisting of diodes D1-D4. The bridge rectifier does not “rectify” the track voltage; it just allows the circuit to be independent of the track polarity. The track voltage passes through unchanged, apart from the small voltage drop across the diodes. After the bridge rectifier, we have 10V DC with a superim­posed 5V pulse train. This is fed to the 3-terminal regulator REG1 to provide +5V for the ICs. The unregulated DC is also fed direct to the H-pack transistors, Q3-Q6. We’ll come back to these later. The track voltage is also fed via the 10V zener diode ZD1 and a 470Ω resistor to pins 6 & 2 of IC1, a 555 timer. The zener diode can be regarded as a level shifter which effectively re­moves the 10V DC, leaving just the 5V pulses to be fed to IC1. IC1 is a 555 timer but its use in this circuit is unconven­ tional. Its main function is as a Schmitt trigger to clean up the pulse waveform after it has been fed through the bridge rectifier and zener diode. 42  Silicon Chip Pin 7 of IC1 is internally switched to 0V whenever pin 3 is low and so C3, the 1µF capacitor at pin 7, is discharged each time pin 3 goes low. However, at the sync pulse interval, which is the gap between each block of 16 pulses, C3 has time to charge up and turn on transistor Q1 which then stays on for the duration of the sync pulse. Q1 pulls pin 11 of IC2 low and this is the “load” function for the 74C193 up/down counter. IC2 actually extracts the wanted pulse for the particular locomotive from the block of 16 pulses. In effect, it is loaded with the wanted pulse number by means of the binary data inputs at pins 1, 9, 10 & 15. The counter then counts down by 16 from the wanted number and the recovered pulse appears at the “borrow” output, pin 13. The magic of this system is that the wanted pulse with its all-important width information is recovered intact and can then be fed to the following decoder circuitry. Going back to Q1 for a moment, it is used to pull pin 11 low for the “load” function. Normally, Q1 would need a collector load resistor of, say, 1kΩ, to make sure that pin 11 is pulled high when Q3 is off; ie, a pullup resistor. In this case though, pin 12 is used to supply the pullup function. This can only be done with the 74C193 or 40193B ICs. If you use other than 74C or B series CMOS for this IC, you will need to isolate pin 12 and provide a 1kΩ pullup resistor from pin 11 to the +5V rail. Decoder operation As already noted, this circuit dispenses with the ZN409CE decoder chip. Instead, the decoding operation is performed by IC3a & IC3b in conjunction with Q2, D5 & D6. Pin 5 of IC3a and the base of Q2 are biased at +3.3V from pin 5 of IC1. This is not a normal use for the threshold pin of a 555 but it works in this application and saves resistors which would otherwise be required for a voltage divider. The recovered pulse output from pin 13 of IC2 is applied via capacitor C5 to the emitter of Q2 and to the inverting input, pin 6, of IC3a via trim- The prototype decoder was installed in a Hornby OO scale steam locomotive and is small enough to fit into some N-scale locomotives. Since the output transistors are driven in linear mode they need to be mounted on the locomotive chassis for heat­sinking. pot VR1 and resistor R4. Normally, the output of IC2 at pin 13 sits at close to +5V and since pin 5 of IC3 is at +3.3V, the output at pin 7 will be low (ie, close to 0V). Diode D5 conducts and so pin 6 is also held at +3.3V. When the recovered pulse is delivered from pin 13 of IC2, pin 6 of IC3 is pulled low (ie, it is a “low-going” pulse) via VR1 and R4 and so pin 7 goes high. D5 is now reverse-biased and capacitor C4 charges, pulling pin 6 lower. At the end of the input pulse, pin 7 goes low again and C4 is discharged via D5. In effect, IC3a acts as an integrator of the recovered pulse and produces a DC voltage which is proportional to the width of the recovered pulse. Diode D6 and capacitor C6 act as a peak detector or “sample and hold” circuit. C6 is charged to the peak of the integrator’s output and again, the DC voltage across it is proportional to the width of the input pulse. C6 needs to be partially discharged each time a new input pulse appears because the new pulse may be narrower, corresponding to a new speed and direction setting. This partial discharge is achieved with Q2 because its emitter is fed with the input pulse from IC2. Q2 acts like a grounded base stage, turning on briefly when its emitter is pulled low via C5, which enables it to discharge C6. Op amp IC3b acts as a unity gain buffer for the sample-and-hold circuit which drives the output amplifiers, IC3c and IC3d. However, even this part of the circuit is not as simple as it appears. IC3c is connected as a non-inverting amplifier and is biased to +5V from the 3-terminal regulator. By contrast, IC3d is wired as an inverting amplifier and its pin 3 is also biased to +5V. Both IC3c & IC3d have a gain of about 3.8. Linear drive Now when the output of IC3b is around +6.5V no power is delivered to the motor because the voltage difference between pins 1 and 14 is insufficient to bias on the respective output transistors. Q3-Q6 look like an H-bridge configuration as used in the original decoder featured in May 1998 but the circuit func­tion is more akin to a push-pull complementary emitter follower setup. When the output of IC3c goes up, IC3d goes down and motor current flows via Q3 & Q6 while Q4 & Q5 are held off. Similarly, when IC3c’s output goes down, IC3d’s output goes up and motor current flows in the opposite direction through Q4 & Q5 while Q3 Resistor Colour Codes           No. 1 1 1 1 2 2 1 1 1 Value 150kΩ 39kΩ 27kΩ 22kΩ 10kΩ 8.2kΩ 1kΩ 470Ω 220Ω 4-Band Code (1%) brown green yellow brown orange white orange brown red violet orange brown red red orange brown brown black orange brown grey red red brown brown black red brown yellow violet brown brown red red brown brown 5-Band Code (1%) brown green black orange brown orange white black red brown red violet black red brown red red black red brown brown black black red brown grey red black brown brown brown black black brown brown yellow violet black black brown red red black black brown February 1999  43 Parts List 1 PC board, 64 x 16mm, code 09102992 1 PC board 15 x 16mm, code 09102991 1 25kΩ top adjust miniature sealed trimpot (VR1) The prototype PC board shown here has been redesigned so that parts no longer sit on top of the ICs. The four output transistors were directly bolted to the chassis diecasting along with mica or insulated heatsink washers and connected to the decoder board via flying leads. & Q6 are held off. Note that while two transistors are always off, the other pair are driven in linear mode instead of switch mode so they will get hot, depending on the amount of motor current. The other point to consider is that the motor does not get pure DC but a portion of the track voltage. For example, at full speed, the motor will get about 9V DC plus the superimposed pulse waveform although its amplitude is reduced in proportion. In practice, this does not effect the motor operation at all and it behaves as though it is fed with pure DC. Decoder PC board The photos in this article show the prototype decoder built into a Hornby OO scale steam locomotive. This is a tender-drive loco (ie, the motor is in the coal tender) and so the decoder has to fit in the limited space inside the boiler. As built, the main decoder board is mounted on the chassis while the four output tran­sistors dispense with a PC board. Instead, they are bolted directly to the chassis die­casting along with mica or insulated heatsink washers and with flying wires back to the decoder board. We have redesigned the prototype board so the layout shown in Fig.2 is somewhat different to that shown in 44  Silicon Chip the photos. The main decoder board measures 64 x 16mm (code 09102992) while the optional output transistor board measures 15 x 16mm (code 09102991). In addition, the decoder board may be cut in two and installed in different parts of the locomotive, with wires link­ing the two, if that is necessary to fit it in. Because both boards are so small, you will need to take great care when assembling them; the risk of solder shorts bet­ ween tracks is high. You will need to use a temperature-controlled soldering iron with a small tip and be very carefull when soldering to the small IC pads. We have used small pads for the ICs to allow tracks between pins and for close component spacing. Ideally, you should also use an illuminated magnifier for this close and detailed work otherwise you are asking for trou­ble. Follow the diagram of Fig.2 exactly, particularly with regard to the orientation of the resistors and other vertically mounted components. The bridge rectifier is tricky since the diodes are mounted vertically to save space. Note that their pigtails should be kept as short as possible as well. The anodes of one pair of diodes connect to the 0V rail while the cathodes of the other pair connect to the V+ rail. The two wires from the Semiconductors 1 555 timer (IC1) 1 74C193, 40193B programmable up/down counter (IC2) 1 LM324 quad op amp (IC3) 1 78L05 3-terminal 5V regulator (REG1) 1 10V 400mW or 1W zener diode (ZD1) 2 BC548 NPN transistors (Q1,Q2) 2 BD433 NPN transistors (Q3,Q4) 2 BD434 PNP transistors (Q5,Q6) 4 1N4004 silicon diodes (D1-D4) 2 1N914, 1N4148 signal diodes (D5,D6) Capacitors 3 1µF 35VW tantalum electrolytics 3 .01µF monolithics 1 .0022µF greencap (metallised polyester) Resistors (0.25W, 1%) 1 150kΩ 2 8.2kΩ 1 39kΩ 1 1.2kΩ 1 27kΩ 1 470Ω 1 22kΩ 1 220Ω 2 10kΩ track (actually from the locomotive wheel collectors) to the bridge rectifier are made as aerial connections to the paired diodes, in agreement with the circuit of Fig.1. The capacitors need to be as small as possible and that means tantalum for the 1µF units, monolithic for the .01µF units and greencap for the .0022. Other types will not fit. When the boards are complete you will need to temporarily connect a motor and power up the power station. The encoder and decoder must be set to the same channel. The full procedure for setup and programming is the same as described in the May SC 1998 issue of SILICON CHIP.