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This unique project demonstrates what
can be achieved with a relatively simple
circuit and some clever programming.
With only a microcontroller and a
handful of components, it functions
as a wide-ranging, multi-frequency
inductance and Q-factor meter.
Inductance
& Q-Factor
Meter
Pt.1: By LEONID LERNER
I
NDUCTORS ARE UBIQUITOUS,
being indispensable in circuits
such as loudspeaker crossover
networks, switchmode power supplies and RF amplifiers. Unlike other
components, inductors are often handmade, particularly when prototyping
or assembling a do-it-yourself project.
At a minimum, this suggests the need
for a meter to check inductance values
prior to use in circuit.
But that is not the end of the story. Of
all the passive components, inductors
typically show the greatest deviation
from ideal behaviour. This is due
primarily to coil resistance and the
hysteresis of the core material.
The picture is further complicated
64 Silicon Chip
by the fact that the losses are frequency
dependent. The skin effect in copper
wire and the complicated frequency
characteristics of magnetic materials
both come into play and are apparent
even at audio frequencies.
To provide a more informative picture of inductor performance then,
this new meter allows you to measure
the Q factor of a prospective resonant
circuit at the operating frequency. If
you’ve never heard of Q factor, then
read on . . .
Measuring L & Q
There are several basic methods
of measuring the inductance (L) and
the Q-factor of a tuned circuit, the
most common being “temporal” (time
domain) and “spectral” (frequency
domain). The spectral method was
described in the “Poor Man’s Q-Meter”
article in the July 2004 issue of SILICON
CHIP. It consists of applying a sinusoidal voltage of varying frequency
to a resonant circuit and measuring
the circuit response as a function of
applied frequency.
The response of such a circuit will
generally follow that shown in Fig.1,
with a peak at a given frequency,
dropping away on both sides in a
bell-shaped curve. Circuit theory
demonstrates that the peak angular
frequency squared is just the inverse
of the inductance (L) times the capacisiliconchip.com.au
Specifications
Range
Inductance: 200nH - 999μH
Q-Factor: 1-120 (approx.)
Power Supply
9V DC 300mA plugpack
Features
(1) Internal or external tank capacitance
facility for accurate Q measurements
(2) Measurement frequency autoranging
up to 20MHz
tance (C). So if we know C, inductance
can be found.
On the other hand, the Q factor is the
ratio of the peak frequency to the width
of the bell-shaped curve at half-power.
This is how the Q is manifest experimentally. Theoretically, it is defined
as the ratio of the circuit reactance to
its resistance at resonance.
It should be emphasised that the
preceding definitions are only approximations but give excellent results
provided Q is greater than 2 or so. For
heavily damped resonant circuits, the
relationships between waveform and
circuit parameters are more complicated. However, we are not interested
in such circuits here.
Fig.1: the spectral response of a resonant circuit reveals a peak at a given
frequency, dropping away on both sides in a bell-shaped curve. The Q
factor is manifest as the ratio of the peak frequency to the width of the
bell-shaped curve at half-power.
Temporal method
The temporal method of inductance measurement is adopted in this
design. It is based on the fact that
when a rectangular pulse is applied
to a resonant LCR circuit, such as that
shown in Fig.2, decaying oscillations
give rise to a ringing waveform. These
oscillations continue until all energy
is dissipated in the circuit resistance,
with their frequency the same as that
at which the peak occurred in the
spectral response. The Q factor in the
temporal response manifests itself as
the ratio of the oscillation coefficient
(the angular frequency) to twice the
decay coefficient.
We can use this information to
measure the L and Q of a parallelresonant circuit with a square wave
generator and a scope. The generator is
connected to the tuned circuit through
a large resistor, so as not to appreciably
load the circuit and thereby alter the
Q. This resistance should be larger
than the series resistance multiplied
by Q2.
siliconchip.com.au
Fig.2: the temporal method used in this design relies on decaying oscillations after a rectangular pulse is applied to the resonant circuit. The
Q factor manifests as the ratio of the oscillation coefficient (the angular
frequency) to twice the decay coefficient.
A typical oscilloscope trace of a
ringing waveform set up in a resonant
circuit by such a generator is shown in
Fig.3. The period is the time required
for the signal to undergo N oscillations, divided by N. The Q factor is
the number of oscillations required for
the peak amplitude (starting at some
convenient peak) to drop to about
0.043 of its initial value. In practice,
one can get better accuracy by counting the number of oscillations for the
amplitude to drop to one fifth, and
multiplying this number by two.
The above procedure is the basis
for this project, with an AT90S2313
microcontroller performing the multiple functions of generator, scope and
calculator. A liquid crystal display
(LCD) and keypad are also included to
provide a convenient means of setting
basic parameters and observing the
measurement results.
Fourier transformed
It is interesting that one can get from
the ringing waveform of the temporal
response to the bell-shaped curve of
the spectral response by a technique
called the Fourier Transform, or its
numerically useful form, the Fast Fourier Transform (FFT). This means one
February 2005 65
Fig.3: this scope shot
shows the response of
an LCR circuit to an
applied pulse. Decaying
oscillations give rise
to a ringing waveform,
which continues until all
energy supplied by the
pulse is dissipated in the
circuit resistance. The
frequency of oscillation is
the same as would occur
at the peak in the spectral
response.
does not actually have to make spectral
measurements in order to obtain the
spectral response.
This is useful because it is much
easier to extract the parameters of
interest from the spectral plot than
from the temporal plot. The former
involves just finding a peak in the data,
while the latter requires establishing
and then counting the zero-crossings.
Another advantage in using FFTs is
that the effects of the inevitable analog
noise, as well digitising distortions, are
minimised, as they are separated from
the signal in the Fourier analysis.
Depending on circuit Q, our meter
can measure inductances as low as
200nH and as high as 10mH. The
range of Q measured varies from about
1 to 120.
Circuit basics
Before looking at circuit operation
in some detail, it is instructive to consider the block diagram in Fig.4. The
central component of the system is an
Atmel AT90S2313 microcontroller.
This particular micro was chosen because it is relatively cheap yet includes
all of the features needed to minimise
the total component count.
The micro controls a “pulser”,
which is used to excite a tank circuit.
The tank circuit consists of the in-
ductor under test and a paralleled capacitor. The capacitor can be selected
by the user and connected externally.
Alternatively, one of three internal
capacitor values can be chosen from
the keypad.
To minimise loading and compensate for circuit losses, the waveform
from the tank circuit is buffered and
amplified by an op amp. Following
this, it is fed into a sample-and-hold
(S/H) circuit and then into an analogto-digital converter (ADC).
The ADC functions are contained
mostly within the micro so they do
not appear on the diagram. A ramp
converter was chosen for its simplicity
and low cost. For readers not already
familiar with this type of converter,
its operation can be summarised as
follows:
A conversion cycle begins with
the charging of a capacitor from a
constant-current source. As the capacitor begins to charge, a binary counter
starts counting from zero. The increasing capacitor voltage (the “ramp”) is
Fig.5 (right): complete circuit diagram
(minus power supply) for the meter.
A high-speed sample and hold
circuit made up of a simple counter
(IC2), analog switch (IC3) and some
clever programming allows the
meter to measure resonant circuits at
frequencies up to 20MHz.
Fig.4: the AT90S2313
microcontroller forms the heart
of this design. After stimulating
the tank circuit, it digitises the
resulting waveform and displays
the results on an LCD.
66 Silicon Chip
siliconchip.com.au
siliconchip.com.au
February 2005 67
ing port bits PD3 and PD4 (IC5, pins
7 & 8).
Signals from these pins are fed
through isolating diodes D6 and D7
to current amplifiers Q3 and Q6 and
from there to switching transistors Q4/
Q5 and Q7/Q8. Two medium-current
transistors are used in parallel to
reduce the dynamic collector-emitter
resistance and hence its influence on
the circuit Q. Even so, the transistors
contribute about 0.5W series resistance and the influence of this on the
Q should be borne in mind.
Relays could have been used to
reduce the series resistance further.
However, these are slow, prone to
failure and not really in accord with
our solid-state approach. In addition,
the use of high-current audio transistors is precluded by their high output
capacitance. If there is some concern
about the contribution of the internal
circuitry to the Q factor then you can
leave out the link and use an external
tank capacitor.
This is the view inside the completed prototype. The full construction details
will be published in Pt.2, next month.
continually compared with the input
voltage. When the two voltages are
equal, the comparator stops the counter, whose count is then proportional
to the input voltage.
Although simple, ramp converters
have a comparatively long conversion
time and a somewhat reduced precision. In this application, precision is
not of particular concern since it is the
time characteristics of the signal that
are of paramount importance.
However, conversion time is important. Inductors in the order of a
few hundred nanohenries require
measurement frequencies of tens of
megahertz to achieve a sufficiently
large Q and so an accurate measurement. This is clearly well beyond
the capabilities of our simple ramp
converter. Even if the design was to
use a dedicated high-speed (20MHz
or better) ADC, the micro would not
be fast enough to store the results of
each conversion.
All this overlooks the fact that the
ringing waveform is repetitive. It can
therefore be digitised at low speed
by repeatedly stimulating the tank
circuit and measuring each waveform
at progressively larger offsets from
time zero.
68 Silicon Chip
To achieve the desired 20MHz
sampling rate, measurements must
be made at 25ns intervals. This is
achieved with the aid of a programmable sample-and-hold block which
holds each measurement long enough
for the low-speed ramp converter to
complete its task.
Detailed operation
The circuit diagram for the majority
of the L/Q Meter appears in Fig.5. Let’s
start at the test terminals, where the
inductor under test and capacitor(s)
are connected to form the tank circuit.
Transistor Q1 is used to pulse the
tank circuit. It is driven via a 100W current limiting resistor from output port
bit PD5 (IC5, pin 9). A second 100W
resistor in the emitter circuit limits
peak pulse current to about 50mA.
Diode D2 provides isolation between
the tank circuit and the driver so as
not to dampen the oscillations.
Installing a shorting link between
the “A” and “B” terminals links the
inductor under test with an internal set
of capacitors. A 1nF capacitor across
the terminals fixes the minimum capacitance. Two other capacitor values
(10nF and 100nF) can be switched into
the circuit under program control us-
Fast op amp needed
So as not to load the tank circuit,
the output signal is buffered by an
op amp (IC4), which is connected
in a non-inverting configuration for
high input impedance. An AD8055
op amp was chosen for the task as
it has high gain-bandwidth product
and high slew rate and is stable when
driving capacitive loads at low gains.
Lower spec op amps are not suitable
here, as they would severely limit the
frequency range of the meter.
Ideally, the output from the op amp
should swing between about 0-4V
maximum, which is the maximum
input range of the comparator. To this
end, op amp gain is set to about 1.8 by
the 1.2kW and 1kW resistors, counteracting losses in the circuit.
To maximise dynamic range and
minimise the influence of noise and
digitisation errors, the AD8055 and
analog switch (IC3) are powered from
±5V supplies. Furthermore, the inverting input of the op amp is biased at
-1.8V, meaning that the output (pin 6)
will swing either side of +1.8V. This
scheme makes the most of available
headroom, which is limited to about
3.7V. Note that the micro is programmed
to reject the initial part of the ringing
should saturation occur.
Hold it a moment
The output of the op amp drives a
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Fig.6: the power supply section. A conventional +5V regulator (REG2) powers the entire circuit,
while a switchmode inverter (IC6) generates -5V for some of the analog circuitry. An LM337
negative regulator (REG3) is used only to generate a bias voltage for op amp IC4.
high-speed sample-and-hold circuit
ahead of the comparator (ADC) input
on pin 12 of the microcontroller. The
S/H circuit consists primarily of an
analog switch (IC3c) and 680pF storage capacitor.
As mentioned earlier, the micro digitises a measurement by repetitively
sampling successive waveforms. Samples are taken at incremental offsets
from time zero to build a complete
and accurate digitisation of the ringing waveform.
Sampling begins by closing the
analog switch (IC3c) at time zero. After the programmed delay, the switch
is opened, leaving the 680pF storage
capacitor charged to the waveform
voltage at that instant. Our slow ADC
then has sufficient time to digitise
the voltage, after which it is stored
and the cycle repeats. This is represented graphically in the scope shots
of Figs.7(a)-7(d).
Unfortunately, the 100ns cycle time
of the micro means that it is too slow
to directly control the analog switch
(IC3c). With a maximum 20MHz sampling rate, we need 25ns resolution.
This is provided by external logic,
consisting of a 40MHz oscillator module (OSC1), timing circuits (IC1 & IC2)
and a level converter (Q2, D1, IC3d,
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etc), all under control of the Atmel
microcontroller (IC5).
Level conversion
Let’s look at the level converter
circuit first. It consists mainly of transistor Q2, diode D1 and analog switch
IC3d. The sole purpose of this circuit
is to convert the 0-5V levels from the
NAND gate output (IC1a) to ±5V levels
to control the S/H switch (IC3c).
Since the minimum sample time is
only 25ns, Q2 is required to switch in
nanoseconds and have a slew rate in
the order of 1000V/ms. This is achieved
with the use of a high beta transistor
and 100W resistors in the base-emitter
circuits, as well as the germanium
diode (D1) between the collector and
base. The results can be seen in the
oscilloscope trace of Fig.7(a).
Q2 inverts the control signal from
IC1a, so a spare analog switch (IC3d)
is used to invert it again before it is fed
to the control pin of the S/H switch.
Timing secrets
The two divide-by-2 sections of a
dual decade counter (IC2) are cascaded
to divide the 40MHz clock down to
10MHz for the micro’s clock input
on pin 5. The divide-by-5 section of
the second half of the decade counter
(IC2b) is used to derive two out-ofphase 8MHz timing signals.
Output 3 (bit 2) of the counter (pin
9) is used by the micro as an 8MHz
synchronisation signal. It is high during only one state of the five states of
the counter, allowing precise determination of the instantaneous state
of the 8MHz clock with respect to the
10MHz clock.
Output 2 (bit 1) of the counter is
NANDed with port bit PD0 (pin 2)
of the micro via IC1a to generate the
“hold” signal for the S/H circuit. As
the micro’s port outputs are synchronised to its 10MHz clock, the difference between the rising edges of the
two signals on IC1a’s inputs allows
generation of 0ns, 25ns, 50ns and 75ns
delays under program control. This
can be seen in the simplified timing
diagram of Fig.8.
Output 2 is also NANDed with port
bit PD1 via IC1d so that the micro can
freeze the counter. Note that Output
2 is used here instead of Output 1 as
it goes high earlier in the counting
cycle, thus allowing for the propagation delay through gates IC1c-IC1d
and IC2b.
Digitising
The micro program performs analog
February 2005 69
How The Ringing Waveform Is Digitised
Fig.7(a): the following series of scope shots were
captured at progressively longer timebase settings and
provide an insight into how the ringing waveform is
digitised. Here, the green trace shows the waveform at
the S/H output (pin 9 of IC3c), while the red trace shows
the control signal on pin 6. Note the very fast transitions
of the latter, which for the all-important trailing edge
(hold) constitutes 7ns, or 1400V/ms. The waveform is
oscillating at a 1.8MHz rate and its instantaneous value
is captured when the control signal goes low. Also,
note that the voltage at the S/H output doesn’t decay
noticeably during the hold period (red trace low), when
the analog to digital conversion takes place.
Fig.7(c): with a timebase of 200ms/div, the sample-and-hold
control signal is now just a succession of spikes and is not
shown. At this time scale, the sequence of flat plateaus
reproduces a digitised version of the original ringing
waveform of Fig.7(a), occurring at a rate almost 1000
times faster.
to digital conversions by using the
AT90S2313’s internal comparator
in a ramp converter. This requires a
voltage rising at a constant rate to be
produced at the inverting input of
70 Silicon Chip
Fig.7(b): a waveform is acquired by continuously stepping
the delay between the pulse applied to the tank circuit
and the hold signal. The rising plateaus generated by
successively greater delays capture the rising edge of a
particular sinusoidal cycle and show how a repetitive
1.8MHz signal is effectively frozen and reproduced on a
much larger time scale. Note that the hold period or the
time interval between successive pulses, reflected in the
length of the plateaus, increases with increasing voltage.
This is because the conversion time of the ramp converter
is proportional to the sampled voltage.
Fig.7(d): this final shot is at the longest timebase setting
(2ms/div). Each bunch of oscillations is the digitised
ringing waveform in the previous figure. Between
acquisitions the micro performs calculations, so the S/H
circuit is idle and the charge on the 680pF capacitor
decays.
comparator IC5 (pin 13). This is produced by an LM334 constant current
source (REG1) which is used to charge
a 4.7nF capacitor.
The LM334 provides temperature
compensation in this time-critical part
of the circuit.
The input signal (via the S/H circuit)
is applied to the non-inverting input
of the comparator (pin 12). The output
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Fig.8: the time difference between the rising edges of 8MHz and 10MHz
clock signals are exploited to enable high-speed sampling. The micro
latches a high on PD1 (pin 3) on the rising edge of its 10MHz clock and
after a 0, 25, 50 or 75ns delay, the rising edge of the 8MHz clock freezes the
input voltage at that instant.
of the comparator is programmed to
trigger a counter interrupt inside the
AT90S2313 when the ramp voltage
exceeds the input voltage.
Note that the LM334 is rather slow
compared to the speed of the rest of the
circuit, so current is not switched at
its input terminal. Instead, switching
is performed at pin 13 of the micro,
which is connected to an internal pulldown transistor. This shunts current
from the LM334 until the conversion
commences.
Once enough of the waveform is acquired, the microcontroller performs
an FFT of the sample and finds the
spectral peak. The FFT is a complicated mathematical procedure and is
quite computationally intensive. It is
therefore usually performed on highspeed floating-point processors such
as Intel’s Pentium class and above.
However, speed is not of paramount
importance in this application. More
importantly, the results must be accurate and this was confirmed by
comparing the results of two FFTs,
one performed on a Pentium and the
other on an AT90S2313.
Display and keypad
A 2-line x 16-character LCD module,
keypad and ISP (in-system programming) interface to the micro via port B
(PB2 - PB7) and one bit of port D (PD6).
A number of port B lines are shared
between devices. The LCD module is
interfaced in 4-bit rather than 8-bit
mode, so only its upper data lines
(DB4 - DB7) are connected.
The keypad has 12 keys, organised
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in a matrix of 4 rows x 3 columns.
The micro pulses each row in turn
and polls the columns to determine
which key is being pressed. Note that
4.7kW resistors are included in series
with all the keypad lines to protect the
port pins. This means that if a key is
pressed while the micro is updating
the LCD, no harm is done.
Power supply
The power supply section of the L/Q
Meter appears in Fig.6. Starting at the
DC input socket, diode D9 provides
reverse polarity protection ahead of a
7805 positive voltage regulator (REG2).
This regulator provides +5V for the
entire board.
As explained earlier, -5V is also
needed for op amp IC4 and the analog
switch (IC3), and this is generated
from the +5V rail by a MAX635 switchmode voltage inverter (IC6). As shown,
this device requires only a diode (D8),
inductor (L1) and filter capacitor to
function as complete switchmode
inverter.
The -5V rail is reduced to -1.8V by
an LM337 negative voltage regulator
(REG3). The 120W and 56W resistors
between the “GND” and “OUT” terminals set the output voltage to -1.8V,
to be used as a bias voltage in the op
amp circuit.
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That’s all we have room for this
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full construction details and describe
how the new Inductance & Q-Factor
SC
Meter is used.
February 2005 71
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