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Improved stability for the GPS-Based Frequency Reference By JIM ROWE Did you build the GPS-based Frequency Reference described in the March-May 2007 issues of SILICON CHIP? Its frequency stability can be significantly improved with a couple of circuit changes, as described here. The modifications also make it easier to lock the oven crystal to the correct frequency. R EADERS WHO BUILT the GPSBased Frequency Reference described in the March, April and May 2007 issues of SILICON CHIP may recall that in the third article we described some circuit changes to improve its short-term stability. These modifications were made in response to an email which had arrived from New Zealand reader Dr Bruce Griffiths, advising that the original method used for cascading the synchronous frequency dividers IC4, IC5 & IC6 was not the best way. When these changes were made, it did appear that the performance of the Frequency Reference had been improved. However, recent testing has shown that there is a better way to cascade the synchronous divider chain. It appears that the earlier changes 40  Silicon Chip created subtle problems in terms of divider instability – and as a result it was much easier than it should have been to set the Reference to “lock” onto a frequency other than the correct 10.000000MHz. This became evident recently after quite a few hours were spent in testing the prototype of the GPS-Based Frequency Reference, with an equipment set-up which had the necessary measurement accuracy. The main cause of divider instability turned out to be the way the “terminal count” output of the top decade divid­ er IC4 (pin 15) was coupled to the “count enable carry” or CET input of IC5 (pin 10) in the next divider stage, instead of the “count enable” input of that chip (pin 7). From my reading of the 74HC160 device data back in 2007, it had seemed that this was the correct choice. However, recent testing showed that with this configuration there was a tendency for IC5 to be occasionally clocked on the ninth pulse from IC4, instead of the correct tenth pulse. As a result, there was a significant “jitter” in the nominal 100kHz output from IC5, as it effectively danced between frequencies varying between 100kHz and 111kHz. After trying various circuit changes, a cure was found by swapping the connections to the CET and CEP inputs of IC5 – feeding the TC output of IC4 to the CEP input (pin 7) and connecting the CET input (pin 10) to +5V. IC4 and IC5 now divide down the crystal oscillator frequency by the correct factor of 100, with rock-steady reliability. siliconchip.com.au IC3a 10MHz TO IC1 (10MHz FROM IC3f) 2 1 IC3b 3 5 7 IC3: 74HC04 IC3c CON1 10MHz OUT 100 4 Helping to put you in Control Control Equipment 6 +5V 100nF 100nF 9 7 10 16 14 PE CEP CET Vdd 12 9 Q2 MR 2 IC4 CP IC3d 74HC160 15 8 Vss TC D0 D1 D2 D3 3 4 5 6 1 10MHz CON2 100 8 1MHz OUT 1MHz 10MHz +5V 9 7 10 16 PE CEP CET Vdd 1 MR 2 IC5 15 CP TC 74HC160 8 Vss D0 D1 D2 D3 3 4 5 6 100nF 11 IC3e 100kHz 10 100kHz +5V IC6: 74HC73 2 14 1 3 J CLK R IC6a K Q 5 Q 11 7 12 13 10 R J 100nF 4 6 IC6b Q 9 50kHz TP3 CLK K 8 Q 50kHz +5V 3 Cin 14 Sin GPS 1Hz PULSES 5 INH 16 Vdd IC7 74HC4046 Vss 10 F 100nF PC3o 15 8  ERROR PULSE PHASE COMPARATOR  ERROR PULSE IC11f 12 13 7 100 CON4  ERROR PULSE (INV) Fig.1: the revised divider circuit (all changes inside the highlighted area). IC4’s TC output (pin 15) is now fed to IC5’s CEP input (pin 7), while pin 10 now goes to +5V. IC5’s TC output is fed via IC3e to the clock inputs of IC6a & IC6b, while the J & K inputs of these flipflops are now tied to the +5V rail. This revealed that there was another configuration error in the original circuit changes to convert the third divider stage (using IC6) to fully synsiliconchip.com.au chronous operation. The method chosen did work but had an unintended side effect: the output pulses of IC6a fed to the phase comparator IC7 were 4-20mA Current Source provides a cheap 2 wire 420mA signal to test PLCs, indicators or other controllers. Can also be used with a potentiometer to provide a remote setpoint. KTC-266 $79.00+GST Industrial Pushbutton Indicators 22mm dia. Fitted with interchangeable contact block and 24V or 240VAC LED bulbs. Red, green, white and yellow available. HER-221 $11.95+GST Temperature Humidity Transmitter 420mA or 0-10V outputs. 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As a result, it was possible for the phase comparator to allow the overall frequency control loop to lock at a number of closely spaced different frequencies – only one of them being the correct 10.0MHz. Restoring IC6 to its original “nonsynchronous” configuration fixed this problem completely. Inverter IC3e which had been used to invert the 10MHz clock signals being fed to IC6 Fig.2: the section of the PCB where the modifications are located. You can also consult this diagram if you are modifying one of the original boards, in which case you will have to cut some of the existing tracks and install short lengths of insulated hook-up wire. CON2 1MHz OUT (for synchronous operation) was now redundant in this role, As a result, it could now be used to invert the 100kHz pulses from IC5, so that IC6 is correctly triggered on the leading edges of the pulses. The leading edges of the now-clean 50kHz pulses from IC6a are now closely aligned with the leading edge of every 200th pulse from the 10MHz crystal, and lagging those edges by a relatively stable propagation delay of between 80na and 150ns (due to IC3c, IC4, IC5, IC3e & IC6a). So that’s the story behind these latest changes. Continued testing has shown that the GPS-Based Frequency Reference can now be locked reliably at the correct frequency of 10.000000MHz, with much better long-term and shortterm stability. The newly revised divider circuit is shown in Fig.1, with the changes all within the highlighted area. As you can see, the TC output from IC4 (pin 15) is now fed to the CEP input of IC5 (pin 7), with pin 10 now connected to +5V. The TC output of IC5 now passes through inverter IC3e to the clock inputs of IC6a and IC6b, while the J and K inputs of these flipflops are now tied to the +5V rail. These changes are fairly easy to make on existing PCBs, simply by cutting a few of the copper tracks and making the small number of new connections using short lengths of insulated hook-up wire. To make it easier for anyone who has not yet built the project, we have produced a Mk.3 version of the PCB pattern which will be available on the SILICON CHIP website, along with a matching parts layout diagram. We have also produced a revised main circuit diagram, which will be available on the website as well. Fig.2 shows the area in the newly revised main PC board where the latest modifications are located, which are in the front right-hand corner just behind CON1 and CON2. This diagram will also help you if you’re making the changes by “operating” on one of the SC original boards. Are Your Issues Getting Dog-Eared? Are your SILICON CHIP copies getting damaged or dog-eared just lying around in a cupboard or on a shelf? Can you quickly find a particular issue that you need to refer to? REAL VALUE AT $14.95 PLUS P & P Keep your copies of SILICON CHIP safe, secure and always available with these handy binders Available Aust, only. Price: $A14.95 plus $10 p&p per order (includes GST). Just fill in and mail the handy order form in this issue; or fax (02) 9939 2648; or call (02) 9939 3295 and quote your credit card number. 42  Silicon Chip siliconchip.com.au