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Higher power, loads more features . . . Deluxe, higher spec eFuse Part one: by Nicholas Vinen No sooner had the eFuse article (April 2017) hit the streets than readers were asking, “Great – but what about (fill in the gaps!)?” So we decided to produce a deluxe version of the eFuse which filled in just about every gap we could think of: higher voltage, higher current, single-ended or bipolar, a touch-screen interface, selectable time constants, a real-time voltage, current and tripping display. It’s based on the tried-and-tested Micromite LCD BackPack. T his deluxe eFuse/DC circuit breaker acts like one or two DC fuses, except that these fuses can be “magically” restored once they “blow”, at the touch of the screen, potentially saving you a lot of money and hassles. If you decide you need a different fuse value or blow speed, you can simply change it on the fly. And unlike a normal fuse, this one shows you how close to blowing it is at any given time. It’s especially valuable when you are building or repairing equipment since you can set the fuse “blow” (trip) current low initially, switch on and see what happens. If it doesn’t blow then you can wind up the trip current and increase the load and/or activate more features in the device you’re testing, progressively checking each function. If something goes wrong, the eFuse will very quickly cut the power off and you can then figure out what the problem is, without letting any of the smoke out. As we mentioned earlier, we published a simple eFuse DC circuit breaker project in our April 2017 40  Silicon Chip issue. That one was a small and lowcost device that was quite easy to build. However, it had limited voltage (16V) and current (10A) capability and you had to change one or two fixed resistor values to adjust the trip current. It also had no display of any sort, apart from LEDs indicating the presence of power and whether the fuse had “blown” or not. This new and much fancier eFuse is more complex, larger and more expensive but it provides a lot of extra features to make up for that. Just look at the many features and specifications listed in the adjacent panel, starting with the higher maximum voltage (32V), much higher current capability (25A+), split supply capability, easy trip current setting via touch-screen and the real-time display of voltage, current and simulated fuse temperature to save you the hassle of hooking up a bunch of multimeters so you know just what’s going on. Basically, it’s a comprehensive DC load and supply protection and monitoring solution which can be used in a lab environment or as a semi-permanent or permanent part of a piece of equipment. Despite all its features, all the components are through-hole types and fit on a modestly sized (132 x 85mm) PCB which itself fits into a low-cost UB1 jiffy box. One bonus feature that you don’t get with regular fuses is that if you are using it with a The prototype split supply, for examPCB for our Deluxe Touchscreen eFuse (there may be ple, when testing an auminor differences between this and the dio amplifier (albeit with final PCB to be described next month). a maximum supply voltsiliconchip.com.au Features and Specifications DC circuit breaker positive supply breaker only, positive and negative supply breaker with independent trip, positive and negative supply breaker with simultaneous trip Working voltage range: 12-32V or ±12-32V Normal trip current: selectable from 0.1A to 30A in 0.1A steps Instantaneous trip current: >68A for >1ms Continuous current handling: 25A; automatic switch-off at elevated temperature Series resistance: approximately 16 milliohms per channel Voltage loss: <0.25V at 10A; <0.5V at 20A; <0.75V at 30A Quiescent current: ~50mA (operating, with screen off) Quiescent dissipation: ~0.5-2W depending on supply voltage and LCD backlight brightness Extra dissipation: ~2.5W per channel at 10A; ~7W per channel at 20A; ~10W per channel at 25A Trip response time (selectable): fast (~10ms for 2x overload), normal (~100ms for 2x overload) or slow (~1s for 2x overload) Read-outs (with screen on): positive and negative input voltage, positive and negative current flow, breaker trip bar graphs (indicates how close to tripping each channel is), breaker state for each channel Extra features: soft start, touchscreen configuration, non-volatile settings, start-up on/off/last state, complete input and output protection with one-way current flow, brief transient protection, overheating protection, binding posts for supply and load connections, adjustable screen brightness, screen auto-off, built-in diagnostics with under-voltage lockout, safety protection fuses Function: Operating modes: age of ±32V), you can program it so that if either rail draws too much current, they will both be switched off simultaneously. This will often prevent one fault from cascading into several, in the case where the DC fuse in one rail blows but the other does not. We can’t guarantee it but this eFuse may react fast enough to sudden high current draw to prevent the destruction of output transistors; it’s well known that conventional fuses are not fast enough (the output transistors “blow to protect the fuses” [!]). Our eFuse can react in well under 1ms when set to its most sensitive mode, so it might just save you some expensive transistors... The input and output connections are made via high-current binding posts and you can use banana plugs for currents up to about 10A and bare wires for higher currents. We’ve made an effort to minimise its additional power supply current drain and internal dissipation, although it will (unavoidably) get a little warm if operated for long periods near its maximum rated current. Touchscreen control The Micromite is part of the reason why we’re able to provide so many siliconchip.com.au features with a modestly complex circuit. Many of the additional features have been provided with software, rather than additional circuitry. And the touchscreen makes it easy to set up and use. General operating principle Refer to the simplified circuit/block diagram, shown in Fig.1. The fundamental tasks required for an electronic fuse/DC circuit breaker are to monitor the current flowing between the input and output terminal(s) and to be able to stop the current flow if it exceeds the programmed limit for long enough (with a progressive overload response more or less approximating that of a real fuse or circuit breaker). To achieve this, the two main parts of the circuit are N-channel “SenseFET” Mosfets Q1 and Q3 and the Micromite LCD BackPack (equivalent) circuitry. The Mosfets have a dual role: they allow us to efficiently monitor the current flow and also to interrupt that current flow should it become excessive. We explained SenseFETs in some detail in the April 2017 eFuse article, as this type of device was contained within the ICs used in that project. But this is the first time we’re using discrete SenseFETs, so they deserve a brief explanation. Essentially, a SenseFET is two Mosfets, one large and one small, connected in parallel in a single package. Because their construction is similar, current flowing through the device is split proportionally between the two. Fig.2 shows the basic arrangement. At left (Fig.2a) it shows how current flow is measured with a traditional Mosfet. The value of resistor “R” normally needs to be very low, say 1mΩ, in order to avoid very high dissipation. Even a 5mΩ resistor would dissipate nearly 5W with 30A flowing through it, and yet the full-scale sense voltage would be just 150mV. That’s far from an ideal situation and a lot of power to waste. However, in reality, a high-power Mosfet is actually multiple, smaller Mosfets in parallel. Fig.2b shows how two would be paralleled but it’s many more than that. This works because they are all on the same die and all virtually identical, so current is shared between them. The SenseFET takes this one step further, as shown in Fig.2c; the majority of smaller Mosfets are paralleled to provide one main Mosfet which July 2017  41 CON1 Q1 Q5 VH +IN S +OUT KS 27k 3k Q7 D IS G +5V +3.3V V+H V+H GATE DRIVE LEVEL SHIFTER VH 22 GND HIGH SIDE POWER SUPPLY IC2b 1M V–H GND 1M IC2a +3.3V 2.2M 2.2M 3k Q6 27k Q3 VL S –IN Q8 D KS IS G +3.3V GATE DRIVE LEVEL SHIFTER +5V SC 22 20 1 7 –OUT V+L IC3b PIC32 MICROMITE +5V LCD TOUCH SCREEN V+L VL LOW SIDE POWER SUPPLY 1M 1M IC3a 2.2M 2.2M V–L carries virtually all the current. A few are split off from the rest and resistor R can be inserted in series with their source terminal. Since a small fraction of the load current flows through this resistor, it can have a much higher value, giving a higher and more practical voltage reading while dissipating much less power, because most of the load current bypasses it entirely. As long as the Mosfets share current in fixed proportions, this scheme provides accurate current measurement with far fewer drawbacks compared to the scheme shown in Fig.2(a). In the case of the BUK7909 devices used here, the current split ratio is very close to 1:999, so in other words, current through the small Mosfet is 1/1000th that of the total current flow. This means that 99.9% of the current does not pass through this resistor, minimising voltage and power losses. The BUK7909 is supplied in a TO220 package with five pins. A typical Mosfet has three pins: gate, drain and source. The BUK7909 has one gate (shared by both internal Mosfets), 42  Silicon Chip V–L Fig.1: the key devices in the Touchscreen eFuse circuit are the SenseFETs Q1 and Q3. drain (shared), two connections to the large Mosfet source (“source” [S] and “Kelvin source” [KS]) and the small Mosfet source (“Isense” [IS]), as depicted in Fig.1. The Kelvin source connection is provided so that we can accurately measure the voltage at the larger Mosfet’s source even when a high current is flowing through its lead which will cause a voltage drop due to its inherent resistance. Now, while we showed the bottom end of the source resistor connecting to the main Mosfet’s source in Fig.2(c), for maximum accuracy, the two Mosfet source terminals must be kept at the same voltage, despite the sense resistor in series with the small Mosfet. Op amp maximises accuracy An increase in the voltage at IS compared to S/KS would mean that the two parallel Mosfets would have different gate-source voltages and thus the current split would not necessarily be 1:199. To solve this, as shown in Fig.1, op amp IC2b monitors the voltage at KS and drives the bottom end of the sense resistor to maintain identical voltages at KS and IS. However, this is not easy to arrange. The op amp’s negative supply rail must be far enough below the source voltage to allow it to produce the required voltage across the sense resistor. This actually is more of a problem for IC3b/ Q3 since Q3’s source terminal is at the fully negative supply voltage when it is in conduction. Also, the sense op amps must be able to handle the maximum current that can flow through the 22Ω resistor. Even at 1/1000th of the full current, that’s still up to 68mA for a 68A total peak current. We achieve this by using an emitter-follower transistor buffer at the op amp output (not shown in Fig.1). The op amp automatically cancels out the added base-emitter voltage because of the negative feedback. The op amp negative voltage supply must also be capable of delivering 68mA. If the op amp or supply can’t deliver 68mA, that could potentially result in an under-reading of the actual current flow and the fuse may not trip on an overload; that would be bad! Because the current through the sense resistor does not flow to the output of the device, this effectively means a 0.1% increase in current drawn from the supply compared to that which is supplied to the load (in addition to the device’s quiescent current). The output of op amp IC2b is a voltage which is initially the same as the source voltage of Q1 when there is no current flow (ie, VH minus the voltage drop across Q1) and the voltage drops as current flow increases. So that the microcontroller (which runs off a 3.3V rail) can sense this voltage, the other half of the dual op amp, IC2a, is used as a differential amplifier. It has a gain of 2.2 times, as determined by the ratio of 2.2MΩ and 1MΩ resistors and its output is the difference between the voltage at the KS terminal of Q1 and the output of IC2b, multiplied by 2.2. So its output is 0V for no current flow, rising to around 3.3V for a current flow of 68A (68A ÷ 1000 x 22Ω x 2.2 = 3.29V). This is fed to the onboard Micromite microcontroller. This micro also monitors the voltage at VH, via a 27kΩ/3kΩ resistive divider, which divides the input voltage by siliconchip.com.au LOAD CURRENT D LOAD CURRENT SENSING MOSFET D G G S R SC  LOAD CURRENT MAIN MOSFET D SENSING MOSFET MAIN MOSFET G MIRROR R SOURCE 20 1 7 MIRROR SOURCE Fig.2: (a) shows how current flow through a normal CURRENT Mosfet can be sensed with a series resistor. (b) shows how a small and large Mosfet can be paralleled within a single device, with the load current split between them, with a ratio dependent on the size of the two Mosfets. (c) expands this concept to include a resistor in series with the smaller “sensing” Mosfet, allowing us to monitor the overall current while keeping power and voltage losses low. a factor of ten. This is used primarily for display purposes. It also monitors the V+H rail (not shown in Fig.1) and will refuse to operate unless it’s high enough to allow Q1 to be switched on properly. The micro controls Q1 via level shifter circuitry, shown here as a “black box”. This pulls the gate of Q1 up to V+H when it is to be switched on, which is around 10V above VH. The gate voltage drops to around 15V below VH to switch Q1 off. Its default condition is off. The circuitry to monitor the current through Q3 essentially mirrors that to monitor Q1, with a few minor differences. Firstly, Q3’s source goes to the input side, rather than the output side, as it controls current flow in the opposite direction. Op amp IC3 runs off supply rails of +5V and V-L (around 6V below VL), compared to the V+H and GND supply for IC2. The gate drive level shifter for Q3 drives it high to V+L (around 10V above VL) and low, to VL. Choice of op amps IC2 and IC3 are LT1490A dual “Over-The-Top” op amps from Linear Technology. These were chosen for very specific characteristics which few op amps possess and that are required in this circuit. We have a detailed review of these devices (and the very similar LT1638) on page 60 of this issue. They have rail-to-rail input and output voltage ranges, with the output able to produce voltages just a few millivolts above the negative rail. This is important since IC2a needs to be able to produce an output very siliconchip.com.au close to 0V when there is no current flowing through Q1 and its negative supply rail is GND. To use an op amp without this capability would require a more complex power supply, to produce a -1V rail for IC2’s negative supply (or something like that). Very few rail-to-rail op amps will operate at up to 44V but these op amps will. That makes them ideal for levelshifting and differential amplifier circuits which need to handle relatively high input voltages, like this one. Also, the quiescent currents of IC2 and IC3 are very low at about 0.1mA, so they minimally load the V+H and V-L supply rails, both of which are provided by charge pumps which have a relatively high output impedance and thus their voltages could drop under significant load. IC3a’s positive supply is the 5V rail because if we used the 3.3V rail, it wouldn’t be able to produce output voltages above about 3V; the LT1490 isn’t as good at swinging to the high supply as it is to the low supply rail. To keep its total supply voltage below the 44V limit, that means V-L can’t go below -39V with the maximum VL voltage of -32V (or -33V to be safe). This has been achieved by making the charge pump that generates the V-L rail purposefully “lossy” (as will be explained below) so that its typical unloaded voltage with VL=-33V is pretty much exactly -39V. Zero voltage “diodes” We haven’t mentioned the “diodes” labelled Q5, Q6, Q7 and Q8 yet. These are “ideal diodes” in the sense that they have virtually no voltage across them when they are in forward con- duction. As you may have guessed (since they’re labelled “Q”), while they are shown as diodes, they are actually Mosfets which are made to act like diodes. So why are these Mosfets/diodes included? Firstly, with a single SenseFET to control the current flow between each input/output pair, we can only block current in one direction. So without additional protection, if you accidentally mixed up the input and output terminals, the circuit could not be broken and so the eFuse and/or load could be damaged. These four “diodes” prevent current flow in this case. They also protect the unit against accidentally reversed supply polarity, especially for the input terminals. They will be explained in more detail later. Control and power supply As you may have gathered, our circuit has two negative supply generators since we need to monitor two SenseFETs with different source voltages (for positive and negative supply situations). It also has a boosted positive supply generator for the upper SenseFET, to generate a sufficiently high voltage (above the positive input supply) to bring its gate high enough for full conduction. The high-side power supply contains three linear regulators and one charge pump. The linear regulators generate a +5V rail for the touchscreen and a +3.3V rail for the microcontroller. These rails are also used for other purposes. The third linear regulator derives a V-H rail 10V below VH. This is then inverted by the charge pump, to produce a V+H voltage about 6V above VH, used primarily for Q1’s gate drive. The low-side power supply contains one linear regulator and one charge pump. The linear regulator is used to derive V+L, about 10V above VL, which is primarily used for Q3’s gate drive. This is inverted by the charge pump to derive V-L, above 10V below VL, used for op amp IC3’s negative supply. Two simple level-shifting transistor circuits allow the microcontroller to bring the Mosfet gate voltages high to switch on the SenseFETs for normal operation. July 2017  43 Fig.3: the complete circuit diagram. You can relate the shaded boxes to various elements in Fig.1; see the labels within. The “ideal diode” sections behave similarly to diodes but with almost zero forward voltage (about 5mV/A). The red and mauve power supply sections generate the voltages required to run op amps IC2 and IC3 and also to drive the gates of Q1 and Q3 to the correct voltages to switch them on fully. 44  Silicon Chip siliconchip.com.au siliconchip.com.au July 2017  45 These circuits are biased so that the Mosfet gates are pulled low by default, so that no current flows until the microcontroller is ready and supervising the current flow. If the micro then resets for any reason (eg, a supply voltage drop-out or software error), the current flow is interrupted and the load is switched off. Circuit description The full circuit of the Touchscreen eFuse is shown in Fig.3. You should be able to see the similarity between its upper-left quadrant and the simplified circuit/block diagram of Fig.1. The internal structure of the four “ideal diode” sections is now visible, each within a blue shaded box. Q5 and Q7 are P-channel Mosfets while Q6 and Q8 are N-channel Mosfets, to suit their low-side and highside situations respectively. The control circuitry for each of those four Mosfets is identical, except it is mirrored for the N-channel Mosfets compared to P-channel Mosfets, ie, NPN driver transistors rather than PNP and so on. The Mosfet types have been chosen to have similar characteristics, critically, a breakdown voltage of at least 30V, a continuous current rating of more than 50A and an on-resistance no more than about 5mΩ, to keep losses low, even at high currents. Looking at the circuitry around Q5, PNP transistors Q9 and Q10 are arranged so that they are constantly “comparing” the voltage across Q5’s channel. Diodes D9 and D10 protect Q9 and Q10 from reverse breakdown of their base-emitter junctions in case of reversed supply polarity. Since the current through these small-signal diodes is similar, their forward voltage will be similar and hence a difference in voltage between Q5’s drain and source terminals appears as a difference in voltage between the emitters of Q9 and Q10. Q9 has its base and collector joined, effectively making it a diode, which is forward-biased by current flowing through its 10kΩ collector resistor. As Q9 and Q10 are the same transistor types, so if Q5’s source voltage is lower than its drain voltage, Q10’s base-emitter voltage is too low for it to switch on fully and the 22kΩ collector resistor pulls the gate of Q5 to ground, switching it on. Current can therefore flow from the 46  Silicon Chip +IN terminal of CON1 to Q1 (ie, “VH”), as long as the +IN voltage is above VH, ie, current is flowing from left to right. Zener diode ZD3 prevents Q5’s gate from being more than 15V lower than its source terminal; a much higher gate-source voltage than that could break down Q5’s gate insulation and ultimately, damage it. Should the voltage at Q5’s source rise above that of its drain, the baseemitter voltage of Q10 becomes higher than that of Q9 and hence Q10 switches on, bringing Q5’s gate high and thus cutting it off. This prevents current flow from right to left through Q5. While this is a linear circuit and thus could theoretically drive Q5 into partial conduction, which could result in very high dissipation, in practice this will not happen. That’s because, in partial conduction, the voltage across Q5 becomes very high and the higher the voltage differential, the more Q5’s gate is driven either up to its source voltage or down towards 0V, switching it either fully off or fully on. So essentially, this circuit is stable only in one state or the other, not in between. Q5’s intrinsic diode is orientated in the normal direction of current flow. If the supply polarity is reversed, Q5’s gate remains discharged and so current can not flow. We won’t describe the other three “ideal diode” blocks since they all operate identically. Current sensing details The two current sense circuit blocks, shaded in green, operate as shown in Fig.1, however, there are a number of circuit details which were hidden in that simplified diagram. Firstly, there is the current buffering arrangement at the output of IC2b (Q2) and IC3b (Q4). These emitter-followers ensure that the op amps can sink at least 100mA. The op amp negative feedback automatically compensates for the ~0.7V drop across each baseemitter junction. The collector of each transistor is connected to V-H and V-L in turn. Since op amp IC2b’s negative rail is at 0V, well below VH and IC3b’s negative rail is V-L, 10V below VL, in both cases the bottom end of the 22Ω sense resistor can be driven well below the respective source voltage, so that IS=KS during normal operation. Diodes D7 and D8 prevent the baseemitter junctions of Q2 and Q4 respec- tively from becoming reverse biased when Q1/Q3 are switched off. The 10pF capacitors between the output and inverting input of each op amp prevent oscillation due to the capacitance and phase shift of the added emitter-followers. The differential amplifiers/level shifters based around IC2a and IC3a are quite simple and almost identical. In both cases, a resistive divider is connected between KS and ground, and the junction of the two resistors is connected to the non-inverting input, pin 3. There is a similar divider between the negative end of the 22Ω sense resistors, the pin 2 inverting input and the pin 1 output. These two pairs of resistors have the same division factor of 0.3125 times (1M ÷ [1M + 2.2M]). Trimpots VR1 and VR2 are included in the middle of one divider so that you can trim them to give exactly the same division ratio, so that the output of IC2a/IC3a is at 0V when there is no voltage across the 22Ω resistors (ie, no current flow through Q1/Q3). This provides a high common mode rejection ratio (CMRR), preventing changes in the supply voltage from affecting the current measurements. Consider how IC2a operates. The voltage at pin 3 is 0.3125 times KS (which is the same as VOH, the highside output voltage). If there is no current flowing, with no voltage across the 22Ω resistor and KS=IS, the top of the 1MΩ resistor connected to pin 2 is at the same potential as KS. Therefore, to have the same voltage at pin 2 as pin 3, the bottom end of that divider needs to be at GND potential, just like the identical divider connected to pin 3. This will be when the pin 1 output is at 0V. Hence, negative feedback determines that pin 1 is at 0V when no current is flowing. When current does flow, the voltage across the 22Ω resistor causes the voltage at pin 2 to drop. But the voltage at pin 3 has not changed, so output pin 1’s voltage must rise in order to keep the voltage at pin 2 and pin 3 the same. Hence, the output voltage increases as the current flow increases. The 2.2MΩ feedback resistor’s ratio with the 1MΩ resistor means that the overall gain is 2.2 times. The outputs of IC2a and IC3a are fed to analog inputs AN4 and AN5 of microcontroller IC1 via 4.7kΩ resistors, which limit the current flow in case these pins are over-driven. Since siliconchip.com.au IC1 has a 3.3V supply, this is the maximum voltage which can be read at those inputs. Given the 2.2 times gain, that equates to a maximum voltage across the 22Ω resistors of 1.5V (3.3V ÷ 2.2) . That equates to a current flow of 68mA (1.5V ÷ 22Ω) and given the 1000:1 current sense ratio, a maximum sense current of 68A. Anything higher than this will simply read as 68A, hence we have set the instantaneous (~1ms) trip current to this level since the actual current flow could be higher and the safety protection fuses (F1 and F2) could blow if this is not interrupted, along with possibly Q1 and Q3 being damaged. Gate drive NPN transistor Q17 is biased on by default, by a 100kΩ resistor from its base to the 3.3V rail. This pulls Q1’s gate down to 0V, keeping it off, although it is clamped to about 16V below VOH to protect Q1. When Q1 is off, VOH tends towards 0V as no current can flow through it, so ZD1/ZD2 will not normally conduct for very long. The current through them is normally limited to about 10mA (3.3V ÷ 100kΩ x 300 – typical beta for Q17) . When microcontroller IC1 wants to switch Q1 on, it pulls its RA2 output low, switching off Q17 and allowing the 100kΩ resistor to V+H to pull Q1’s gate above VH/VOH. The relatively high 100kΩ value combines the Q1’s gate capacitance of around 10nF to provide a “soft start” time of about 1ms (100kΩ x 10nF). This prevents very high current surges into capacitive loads, although switch-on current flow could still be enough to trip the eFuse, depending on how it’s configured (just like a normal fuse or circuit breaker). The gate drive for Q3 is a little different. PNP transistor Q21 is normally switched on due to the 100kΩ pulldown resistor at its base. It, in turn, supplies current to the base of NPN transistor Q18 which has its emitter tied to VL, normally below 0V. This pulls Q3’s gate down to VL, which is its source voltage, hence keeping it off. To switch on Q3, microcontroller IC1 brings its RA3 output high, forcing Q21 to switch off and in turn, Q18 loses its base current. This allows Q3’s gate to be pulled up to V+L via the 100kΩ resistor, again giving a softsiliconchip.com.au start time of around 1ms. No gate protection is needed since V+L is never more than 15V above VL. Voltage monitoring The VH and VL input supplies are monitored by IC1 primarily so that they can be displayed for the user. However, they are also used to provide the under-voltage lockout function, where IC1 will refuse to switch on Q1 and Q3 if the relevant supplies are not high enough to guarantee correct operation. Normal operation starts with a supply voltage of at least 11V and will continue as long as the supplies do not drop below 10V. VH is divided by a factor of ten using 27kΩ and 3kΩ resistors and applied to analog input AN0 of IC1 (pin 2). Thus, it can read up to 33V. The 3.3V supply is used as a reference; the MCP1700 regulator has a typical error of ±0.4% at 25°C, so calibration is not critical although the software does allow you to calibrate the readings for high accuracy. V+H is also monitored, in a similar manner, although the divider resistors are 390kΩ and 30kΩ. The higher values are to reduce the loading on the V+H rail as it has limited current delivery and the division ratio has been increased to one-fourteenth, since the V+H rail can range up to about 42V (not coincidentally, just below the maximum recommended supply voltage for the LT1490 op amps of 44V). The arrangements for monitoring the VL and V-L rails, at analog inputs AN9 (pin 26) and AN11 (pin 24) are basically the same, except the “far end” of the divider goes to +3.3V rather than ground; this is to keep the voltages at these pins between 0V and 3.3V. The software subtracts 3.3V from the readings at the same time as compensating for the divider values, to get true voltage readings. Monitoring V-L and V+H has three purposes. One, it provides a debugging feature; if the power supply is not built properly, IC1 will detect this and display a message on the screen. Two, it protects the unit against damage in case either or both boosted rails drop below the minimum required for correct operation, in which case the outputs will automatically be tripped and a message displayed. This should not normally happen and could indicate a faulty component or that the power supply voltage dropped too much under load. Finally, it allows the microcontroller to fairly accurately model the dissipation in Mosfets Q1, Q3 and Q5Q8 during operation and track their assumed temperatures. The unit will then shut down the outputs if any is at risk of serious overheating. While the unit can be configured with a trip current of up to 35A, we’ve quoted a continuous current handling rating of 25A since both Q1 and Q3 will be dissipating 4.7W (25A x 25A x 7.5mΩ) at 25A. That’s fairly substantial, despite them having flag heatsinks, especially in a plastic jiffy box and especially if high currents are being drawn from both outputs. With a sustained current of say 30A, the unit may not trip normally but the Mosfets could still get very hot. So the unit will trip to prevent overheating and damage and will display a message on the screen indicating this. Power supply details The high-side power supply, responsible for generating the +3.3V, +5V, V+H and V-H rails, is shown in the red shaded box. Schottky diode D1 is used even though there is an “ideal rectifier” between +IN and the VH rail so that brief drops in the incoming supply voltage, due to high load current (eg, at initial switch-on of a capacitive load) to not cause the supply rails to drop too quickly. The 1Ω resistor and 33V zener diode ZD7 combine to filter out very brief spikes which may occur, for example, due to back-EMF from a motor load, protecting linear regulators REG2 and REG3. REG2 is an LM337 negative adjustable linear regulator. The 680Ω and 100Ω feedback resistors set its output voltage very close to 10V below VH. In this case, its “input voltage” is ground and its “ground” voltage is VH. This produces the V-H rail. REG2 is in a TO-220 package which uses the PCB as a heatsink, since it may need to (briefly) supply up to 100mA with a 22V input-output differential which works out to a dissipation of 2.2W. 555 timer IC4 is connected between VH (after D1) and V-H, ie, the output of REG2. So with a +IN voltage of say +24V, its VCC pin will be at around +23V while its GND pin will be at around +13.7V (ie, 10V below VCC). July 2017  47 Since its output (pin 3) is connected via a resistor to the threshold and trigger inputs (pins 6 and 2 respectively), it will oscillate with a 50% output duty cycle; each time the output switches high, this will charge the 220pF capacitor between pins 1 and 2 until pin 6 reaches 2/3 its supply voltage. The output will then switch low and discharge that same capacitor until it reaches 1/3 the supply voltage, then the output will switch high again and the process will repeat. The time constant of the 22kΩ resistor and 220pF capacitor sets the oscillation frequency to around 100kHz. Each time output pin 3 goes low, the 1µF capacitor charges to around 9.7V, via schottky diode D2 from VCC. When output pin 3 goes high, the anode of schottky diode D3 is raised to around 9.7V above VCC and so D3 is forward-biased and the 1µF capacitor between VCC and V+H charges. The result is that V+H tends towards around 9.4V above VCC, ie, around 9V above VH. The remainder of the high-side supply is quite simple, with 5V linear regulator REG3 producing the +5V rail for the LCD touchscreen and op amp IC3 and this is also fed to REG1 to produce the +3.3V rail for microcontroller IC1. Because the combined total of these currents can exceed 100mA and because the input to REG3 can be up to about 32V, giving a differential of 27V and a dissipation in excess of 3W, REG3 uses the PCB as a heatsink. The software automatically limits LCD brightness with a high supply voltage to ensure REG3 doesn’t overheat and “drop its bundle” (go into thermal limiting, likely shutting down the whole device). The low-side power supply more or less mirrors the high-side supply, although without the 5V and 3.3V regulators. It is shown shaded in mauve. Diode D4 is a cheaper 1N4004 standard diode rather than a schottky diode (like D1) since the critical V+L supply which is used to drive the gate of Mosfet Q3 does not rely on the charge pump and so it has a lower effective dropout voltage. Thus the extra forward voltage of D4 is not a major issue. V+L is derived in a similar manner to V-H, only using an LM317 positive regulator rather than an LM337 neg48  Silicon Chip ative regulator. V+L sits about 9.3V above VL. This is then fed to another 555 timer, IC5, which inverts this voltage in a similar manner as described above for IC4. The result is V-L, which is around 6V below VL. As we mentioned earlier, this is a purposefully lower supply voltage than V+H in order to keep IC3a within its maximum supply rating of 44V (ie, V-L can not exceed -39V). This is achieved by using 1N4148 standard signal diodes in the charge pump, rather than 1N5819 schottky diodes, each adding about 0.5V further voltage drop, plus red LED1 in series with D5 for an additional voltage drop of around 1.8V. The full load current of IC5 must pass through LED1, which equates to just over 30mA with a load current through Q3 of 30A. As a result, we specify a current rating for LED1 of 50mA, which is available in a 3mm package from Jaycar. This is pretty safe, since a sustained Q3 current of 50A will pretty quickly trip the output off, also protecting LED1. Microcontroller and touchscreen The arrangement of IC1, REG1 and the LCD touchscreen is copied directly from the Micromite LCD BackPack, a standalone project which was published in the February 2017 issue. While we could have designed this unit to use the BackPack as a plug-in module, we decided that integrating the circuit onto the main PCB would save cost. The same kit of parts can be used to build this section of the board, minus the BackPack PCB and laser-cut lid (since the box used in this project is bigger). There isn’t much to the BackPack; besides the power supply, there’s just PIC32 microcontroller IC1, its 10kΩ MCLR-bar pull-up resistor that prevents spurious resets, the bypass capacitors and required core filter capacitor between pin 20 of IC1 and ground, a 4-pin serial interface connector (CON3) and the 14-pin female header for the LCD touchscreen to plug into (CON4). IC1 communicates with the LCD using two SPI interfaces, one to send commands and data to the LCD and one to interface with the onboard touch sensor IC. They share three wires: pin 25, the SPI clock, pin 3, the SPI OUT data line (which goes to the data inputs of the LCD controller and touch controller) and pin 14, the SPI IN data line (which goes to the data outputs of the two controller ICs). The touch SPI interface is selected when IC1 drives pin 17, T_CS-bar low while the LCD SPI interface is selected when IC1 drives pin 4, CS-bar low. Pin 5 will reset the LCD controller when brought high and is kept low for normal operation. Pin 22 (D/C) is used to indicate to the LCD whether bits being sent represent data or a command. Pin 15 (T_IRQ) is used by the touch controller to send a signal to IC1 when the touchscreen is being used. There are really only two differences between this circuitry and the Micromite LCD BackPack. Firstly, we have omitted the in-circuit serial programming (ICSP) header to save space. This means you need to plug a preprogrammed Micromite chip into the board but it can still be configured and programmed through the CON3 serial interface. The other change is that we have replaced the manual backlight control, which used a trimpot as a rheostat, with transistors Q19 and Q20. A PWM signal from output pin 18 of IC1 is used to control the backlight brightness. When pin 18 is driven high, it switches on NPN transistor Q20 which sinks current from the base of PNP transistor Q19, applying 5V to the backlight anode pin, pin 8 on CON4. Q20’s base is driven with approximately 26µA ([3.3V – 0.7V] ÷ 100kΩ). Given a typical beta of around 230 at that current level, it will sinks around 6mA from Q19’s base, which is more than enough to drive it into saturation, given the typical 100-200mA drawn by the LCD backlight LED array. Pin 18 is not a dedicated Micromite PWM output; we use a CFUNCTION in the software to provide an emulated PWM function at around 1kHz, to prevent backlight flicker without using too many of IC1’s CPU cycles. Next month Next month we will show the final PCB design, the fully assembled unit, go over some of the details of the software, go through the PCB assembly, case preparation and final assembly procedures and explain how to use the unit. SC siliconchip.com.au