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SILICON
SILIC
CHIP
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Nicholas Vinen
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Editorial Viewpoint
Encouraging chip developments
I’m thrilled to see that Advanced Micro Devices
(AMD) are making a comeback in the desktop/notebook CPU market with their Ryzen 3000 series of processors. These have finally overtaken the latest Intel
chips in some benchmarks, and offer outstanding value for money.
I was quite concerned in 2016 when they nearly
went bankrupt, since without AMD, Intel would have
a virtual monopoly in the CPU market, with little incentive to innovate. Recall that it was AMD who released the first 64-bit x86-compatible CPU in
April 2003. Intel quickly implemented a compatible 64-bit scheme, lifting
us from the looming 4GB memory access limit.
AMD has also historically helped to keep CPU prices down. Their strategy
to compete has been to offer almost as much performance as Intel chips at
much lower prices. They also helped to popularise multi-core computing,
as their first dual-core Athlon 64 CPU was released in April 2005, a full year
before Intel brought their Core 2 Duo processor series to market.
The current ‘race’ seems to be to see who can jam the most cores on a
single chip. The current innovation is the idea of separating the chip cores
themselves and the onboard I/O controller onto separate silicon dies, and
bonding them together in a single package with very fast interconnects.
That brings the possibility of using multiple core dies in a single chip,
which is what AMD has done with the Ryzen 9 3950X, jamming 16 cores with
32 threads into a single package with a maximum ‘boost’ clock of 4.7GHz.
It’s impressive engineering and no doubt Intel is rushing to leapfrog AMD.
On a different topic, Xilinx recently announced their Virtex VU19P, a huge
new FPGA (Field Programmable Gate Array). It’s built on TSMC’s 16nm process and boasts nine million logic cells, more than 16GB of onboard memory
and 460GB/s memory bandwidth. It’s an astounding device.
This is a vast (and expensive!) chip, with a die size of around 900mm2,
capable of implementing 16 ARM Cortex A9 cores simultaneously. I’m told
the logic compile/synthesis time for a design that fills the chip is around
two days!
A device like this would be very handy for those designing moderatelysized CPUs or very large scale logic devices. It’s a lot faster to test such a device by uploading it to an FPGA and then running tests on that, compared to
software simulations. And you definitely want to test your design thoroughly
before spending millions of dollars on having ASICs (Application-Specific
ICs) made. So you’d need the latest cutting-edge FPGA.
In even more pioneering news, MIT researchers and Analog Devices recently succeeded in building a 32-bit processor called the RV16X-NANO
using carbon nanotubes. It has around 14,000 individual transistors made
from semiconducting nanotubes.
As with many other unproven new processor technologies, I am a little
sceptical as to whether this will ever catch up with traditional CMOS logic
in terms of performance at commercial scales. But the fact that a working
chip has been made means that the technology is a lot closer to production
than many other technologies, even if it runs at a rather pathetic 10kHz
clock speed.
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