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THE CROMEMCO DAZZLER The Cromemco Dazzler was probably the first ‘reasonable’ computer graphics device capable of producing a colour image. It generated an NTSC composite video signal that could be fed to a monitor or TV. As they are now quite rare, I built a copy of the By Dr Hugo Holden device and in doing so, discovered some quirks. C omputer graphics were coming of age in the mid-to-late 1970s, and efforts were being made to provide home computer enthusiasts with graphics accessory cards. These were typically designed to be used in early S-100 computers such as the Altair and others. Matrox was on the front line then, with monochrome graphics cards such as the ALT-256 and the ALT-512 (as described in our October and November 2020 issues; see siliconchip.com. au/Series/352). Three Matrox monochrome cards could be deployed to make an RGB colour system, but it was a very expensive purchase. Other companies such as Godbout Electronics offered the “Spectrum” board by 1980, which was advanced enough to support colour and have onboard video RAM. But before that, the Cromemco company offered the “Dazzler” board set in 1976. graphics cards. It was the first colour graphics card for S-100 bus computers, having an NTSC colour composite video output. The idea behind it was born in 1975 when Roger Melon and Harry Garland created the first solid-state video camera. Their idea was to use a 1k x 1 bit MOS dynamic RAM IC with its top cut off, acting as an optical sensor (transistors are photosensitive). This led to the creation of the “Cyclops” solid-state video camera (Fig.1), and the founding of Cromemco. The camera controller board put the camera’s pixel data into general RAM in the host computer. The Dazzler board could read that RAM and create a standard (or close to standard) NTSC composite video signal to feed a colour video monitor or a domestic TV set via an RF modulator. But the Dazzler board set became an entity of its own. It was presented as a Fig.1: the Cromemco “Cyclops” video camera was innovative in that its sensor was an SRAM chip with the lid removed! That’s a similar principle to the one used by CCD and CMOS sensors today. Dazzler history The Cromemco Dazzler was pivotal in the development of computer siliconchip.com.au Australia’s electronics magazine September 2021  27 project to build in Popular Electronics magazine, February 1976. It became so popular that Cromemco started making it, both in kit form and fully assembled and tested. It found its way into the television industry, being used to produce colour graphics for weather forecasts. Unlike other graphics cards of the time, which had non-interlaced scanning, the composite video signal generated by the Dazzler was an interlaced scan, compatible with the NTSC colour television system. The Dazzler has no onboard video RAM; instead, it hijacks the host computer’s system RAM for the job by using direct memory access (DMA). This required the computer’s RAM to be fast static RAM with an access time of 1µs or less. Dynamic RAM did not work because the refresh activities interrupt the proceedings. The Dazzler came as two separate S-100 boards, linked by a 16-way ribbon cable, as shown in the photo. The two boards contain a total of 72 ICs, most of which are common 74 or 74LS series TTL types. The exception is one extremely rare IC, the TMS3417 quad 64-bit shift register, which was rare even in the 1970s. Dazzler board sets are very hard to come by these days, so I realised that if I wanted to try one out, I would have to make replica PCBs and obtain the parts to populate them. Making the boards Cromemco provided the PCB foil patterns in their manual, but the old photocopies I could find were not very clear in places. After some months tracing over them in a drawing program, I managed to make clear copies of each board’s top and bottom track patterns. Then I checked them against the schematic to correct errors, which took a few late nights. I then sent the image files to LD Electronics (see Market Centre on p111), and they made very high-quality PCBs for me, with an exact track pattern Figs.2 & 3: the reconstructed Dazzler boards, packed with discrete logic ICs. Note the blue socket in a similar position on both boards, which allowed them to be connected via a ribbon cable with IDC connectors at each end with the same footprint as a DIP chip. 28 Silicon Chip Australia’s electronics magazine siliconchip.com.au replica to my drawings and with gold plating. George from LD Electronics did a terrific job; they are likely better than the originals. Figs.2 & 3 are the overlay diagrams for the two PCBs, showing both copper layers and where the components go. I acquired all of the components required as per the parts list in the Cromemco manual. As part of this, I imported NOS Augat gold machined pin sockets for all the ICs. It became apparent right away that the TMS3417NC 5MHz 64-bit shift register would be a problem. The closest modern part I could find was the 74HCT7731, but it has a different pinout, and I was not 100% sure if it was a suitable substitute. Another possible candidate is the Fairchild F3342DC, which is pincompatible, but only rated at 2MHz. Initially, that put me off. However, a Practical Electronics article from 1976 showed an F3342DC IC being used in a Dazzler. After much searching I found a small number of TMS3417 IC in Germany and a few F3342DCs in the USA, so I am well stocked for these now. Once I got the Dazzler operating, I found that the clock frequency for this shift register is close to 1.8MHz, explaining why both the 2MHz and 5MHz rated shift registers work. Once the Dazzler was assembled, I fitted it to my SOL-20 computer. Much to my surprise, considering all the steps involved in the PCB artwork and the large number of mainly vintage ICs, it worked immediately. By that, I mean that it responded normally to manipulating its registers and testing its modes and running a software package. Testing it out My SOL-20 computer has external 5.25in disk drives which allow me to run the CP/M operating system. This has an assembler, so I was able to assemble the Kaleidoscope program. This was one of the most famous programs that ran with the Dazzler. It puts the Dazzler cards into a 2KB 64 x 64 pixel display mode (4096 pixels total). Fig.4 shows the space occupied on a monitor by the Dazzler’s image in this mode. Four bits of each byte control a pixel; three bits code the RGB combination and one bit the intensity, as shown in Fig.5. The Kaleidoscope program places siliconchip.com.au Australia’s electronics magazine September 2021  29 Screens 1-6: these still images don’t really do the Kaleidoscope software justice. Check out https://youtu.be/2tDbn1N8EWI to see it in action. the image in the computer’s RAM starting at address 0200 hex and ending at 09FF hex. The image is divided into four 512 pixel blocks, as shown in Fig.6. The program only alters one 512 pixel block, and the data is rotated and copied into the other three blocks to provide the Kaleidoscope-like symmetrical effect. When the Kaleidoscope program is running, it is quite something to observe. You can see a video of the resulting display at https://youtu. be/2tDbn1N8EWI It is hypnotic and mesmerising. The images shown in Screens 1-6 only indicate how it looks. These stills were photographed directly from the face of the CRT. If the program is terminated (with a CPU reset), this resets the Dazzler hardware and switches the Dazzler off. The last image values remain in RAM, so if the Dazzler board is switched back on and set into the same mode, the last image is seen there as a still frame. This short machine language program switches the Dazzler on: 3E 81 D3 0E 3E 30 D3 0F C3 04 C0 Fig.4: the image from the Dazzler doesn’t fill the screen; instead, it is a rectangle about 68% of the scan width and 77% of the height. The black borders around the edges would be smaller on a TV screen due to overscan. It could produce a 64 x 64 pixel image with 4-bit colour, or a 128 x 128 pixel monochrome image. 30 Silicon Chip Australia’s electronics magazine siliconchip.com.au Fig.5: the 15 colours available in 4-bit colour mode. The I bit controls the intensity while the R, G and B bits determine the colour. They could have added a 16th colour (dark grey) by using the intensity bit in combination with black, but that probably would have complicated the circuitry. This is equivalent to the short assembly language program: MVI A,81H OUT 0EH ; sends 81H to port 0E on Dazzler card (starts image at 0200H) MVI A,30H OUT 0FH ; sends 30H to port 0F on Dazzler card (colour mode 2k picture) JMP 0C004H ; returns to the Sol’s operating system without a reset These are easily entered to memory say (at 0100 hex) in the Sol with the EN command, and executed with the EX 0100 command. Video signal details The output is an interlaced scan format (as is NTSC); however, there are no equalising pulses around the vertical sync pulse. So the interlace is not perfect, and examination shows there is a slight line pairing of the scan lines of consecutive even and odd fields. This is only detectable with a monochrome image on a monochrome monitor; it is much harder to see on a colour monitor/TV. The Dazzler also has a non-standard horizontal line scan period. For NTSC, this is usually around 63.5µs, while for the Dazzler, it is around 62.6µs. In addition, the Dazzler uses a very siliconchip.com.au Fig.6: the addresses where pixel data appears in the computer’s memory in 4-bit (64 x 64 pixel) mode with a starting address of 200 hex, compared to the physical layout. Note how the data jumps from the upper left quadrant to the upper right, then to the lower left and lower right, complicating how the computer needs to write video data. wide burst gate pulse of around 4.7µs. This lets through a wider-than-normal colour burst, which starts immediately after the horizontal sync pulse, so there are more cycles of the colour burst. The colour burst also appears on the vertical sync pulse when it is low, due to the way the pulses are combined. None of this usually bothers the NTSC colour decoders in TV sets. Only a percentage of the active line and active field time scan is used, so there is quite a lot of space on the screen around the actual displayed pixel area. This helps to allow for overscan on domestic TV sets. About 77% of the vertical active scan time is used, and about 68% of the active horizontal scanning time. So the image on the monitor’s 4 x 3 screen (1.33 ratio) adopts a 1.17 ratio, with the overall image (and each pixel) not being perfectly square. Screen 7: the colour test bars as produced by the Dazzler on a standard NTSC-compatible CRT screen. Screen 8: the same bars as in Screen 7, shown on a monochrome display. They don’t decrease in intensity leftto-right as expected. Australia’s electronics magazine September 2021  31 Scope 1: this scope grab shows how the NTSC DC signal level jumps around as the CRT beam sweeps across the test bars. With a standard NTSC signal, you would expect a series of evenly decreasing ‘stair steps’ instead. Screen 9: the rearranged colour test bars should allow the Dazzler to produce the expected result on a monochrome display... The colour encoder To check the Dazzler’s operation and correctly set its red and green colour carrier phase adjustments, I wrote a short assembly language program to generate an output that resembled a standard NTSC colour test pattern. This enabled the best setting of these controls for the most accurate colour rendition and white balance. I used Figs.5 & 6 to help me do this. Note how the memory addresses are not continuous due to being broken up into four quadrants. I wrote a standard NTSC test pattern into the memory, and Screen 7 shows the result (with optimum adjustments of the R & G phase presets on board 1) with high-intensity colours selected. If the usual NTSC luminance (Y signal) weighting was used, when switched to monochrome (on the TV or monochrome mode on the Dazzler card), it should give a descending order of luminance from left to right. However, it did not as Cromemco chose a different arrangement. Scope 1 shows the monochrome mode levels (also notice the wide burst is still there in monochrome mode), while Screen 8 shows the image on a monochrome monitor. In the Cromemco system, the next step down in luminance from white is cyan, then magenta, blue, yellow, green and finally, red. For comparison, the standard NTSC luminance steps are shown in Fig.7. This anomaly comes about because of the relative proportions of R, G & B to create white in the Cromemco luminance resistor matrix differ from the standard. For NTSC, the weighting is generally 30% red, 59% green and 11% blue but the Dazzler uses weights of 14% red, 29% green and 57% blue. Despite this, it is hard to see the effect of it on a colour image. This is because the colours are heavily saturated. The problem is only apparent Fig.7: for a standard NTSC signal, the test pattern contains coloured bars in this order. On a monochrome monitor, they appear as bars of decreasing intensity leftto-right. 32 Silicon Chip when the card is switched to monochrome mode. I programmed another test pattern to investigate this, putting the colours in the luminance order that Cromemco did. This is shown in Screen 9, and it includes the memory byte values (for two consecutive pixels) that correspond to the colour and intensity selection. Notice how the byte values correspond directly to the brightness level, and also that blue looks a tad purple (for reasons explained below). When switched to monochrome mode, the greyscale is very respectable for this colour order (Screen 10). The magnitude of the grey level being proportional to the nibble value that codes the pixel is convenient for programming monochrome images. If the three RGB resistor mixing assignments are switched around to make them conform to an NTSC scheme, the result is as shown in Screens 11 & 12. Fig.8: the general colour mixing scheme used by the Dazzler, similar to how audio data is typically mixed, with a virtual-Earth inverting amplifier. The resistor values determine the relative intensities of red, green and blue, as shown at the bottom of the figure. Australia’s electronics magazine siliconchip.com.au Screen 10: ...and here’s confirmation that they do so. Screen 11: back to the standard colour test bars, but this time with tweaked R, G & B intensities to give a more correct result. Screen 12: the same display at left on a monochrome monitor, confirms that changing the relative intensities produces the expected result. It became clear after some investigation why this was the case. The colour system which interprets the memory byte (or nibble for a single pixel) used in this mode is MSB…LSB (MSB is the most significant bit, LSB the least significant bit) where the four bits code I, B, G, R where I is intensity, high (1) or low (0). Changing that to I, G, R, B would give the Dazzler a colour order that matched NTSC. Also, an RGB image (if that were to be provided directly from the board) would match up exactly with a composite video image in all respects (except perhaps having superior resolution). Why Cromemco did not make it like this is a mystery; however, in the field of computer graphics, things like this often crop up. Most early computer systems used monochrome or RGBI systems (like CGA), and there was less compatibility with domestic television systems. As another example of this sort of thing, in IBM’s early computers from the 1980s, the output from IBM’s CGA card had both composite and RGBI outputs. But the image seen on a composite monitor did not match up with that seen on a CGA monitor. Fig.8 shows how to calculate the relative contributions of the red, green, and blue channels to the output’s luminance level based on the resistor values in the circuit. In Cromemco’s original scheme, to use the host computer’s memory byte to represent two pixels, they assigned them as shown at the top of Fig.9. In the NTSC system, where the relative luminance intensities were assigned to the three colours G > R > B, (59% > 30% > 11%), if this is normalised to make blue = 1 then the proportions are 5.4 green, 2.7 red and 1.0 blue. Therefore, if the colours are also represented by three binary bits per pixel, the intensity weighting is not too far off the bit magnitudes of 4, 2 and 1. This is why in a digital system attempting to replicate NTSC video, it is better to have blue as the LSB and green as the MSB, as shown at the bottom of Fig.9. This way, when the bits are mixed in magnitude to form a greyscale, it better matches the NTSC system. Presumably, Cromemco did it this way so that the greyscale intensities corresponded to the binary values stored in memory. However, if the colour image in memory was derived from NTSC originally, then the picture would not have the correct shades of grey in monochrome mode. It is simple to modify the Dazzler card to fix this by swapping the three resistors around and switching the three connections feeding the luminance adder as shown in Fig.10. However, I do not propose to modify my card, because that would be like trying to change history, and I want to keep the Dazzler the way it was designed. Fig.10 (right): the Dazzler’s mixer circuitry could be modified like this to produce a more standard signal, but the author built his card with the original design for authenticity. siliconchip.com.au Australia’s electronics magazine ► ► Fig.9 (below): how the RGB pixel data is stored in memory interacts with the circuitry to determine the ratios they are mixed in. If changed from the existing order at the top to the new order at the bottom, the NTSC signal produced would be more standard, producing the expected test pattern on a monochrome monitor. September 2021  33 Fig.11: more details of the circuitry surrounding the output stage, showing the phase shift circuitry used to generate the colour subcarriers. Colour encoder details Fig.12 (right): a standard NTSC phasor diagram. As described in the text, the phase shifts produced by the Dazzler are slightly different (as well as the amplitudes), producing less pure colours. Circuit complexity would have to increase to produce more accurate results. Fig.13 (above): in monochrome mode, even the pixel order within a single byte is not straightforward! The bits control pixels spread across two lines, in a nonobvious order, complicating the code to drive the display. 34 Silicon Chip Australia’s electronics magazine The output amplifier is in an inverting configuration, so its input has a virtual Earth. Therefore, the currents fed in via the resistors shown in Fig.11 are mixed without interfering with each other. The standard NTSC colour subcarrier phasors are shown in Fig.12, with respect to the colour burst (reference) at 180°. Note how the blue phasor’s amplitude is slightly lower than the red and green, which explains why they used a 15kW resistor rather than 10kW on the blue colour carrier gate’s output. The blue carrier phase is nearly 180° delayed from the burst. To attain this phase, Cromemco simply inverted the burst signal using a NAND gate wired as an inverter. This explains why the blue bar (on the test pattern) looks just a little purple, because there is a small phase shift toward magenta. With optimum settings of the red and green phase controls (VR27 & siliconchip.com.au 1000 siliconchip.com.au CHEA3.BIN CHEB3.BIN COMPF.COM COMPF.COM 4096 byte file CMPF2.COM CMPF2.COM Vertical address flip CMPF3.COM CMPFB.COM NNNN.BIN = 12880 byte image file 512 byte Dazzler compatible file 13FF 11FF 1600 1400 The 4x resolution mode CHEC.BIN CHED.BIN COMPF.COM COMPF.COM CMPF2.COM CMPF2.COM CMPFC.COM CMPFD.COM 15FF 17FF DAZZLER MEMORY MAP FOR A 2K BYTE IMAGE Address example starts at 1000h, register 0Eh, programmed with byte value 88h Fig.14: due to the pixel ordering shown in Fig.13, and the way the image was broken up into quadrants, it took three stages to convert the contents of a .BMP file into data suitable for display in the Dazzler’s monochrome mode. ► In this mode, each byte of the image memory file in RAM controls eight pixels, with the bits turning the pixel either on or off (ie, monochrome). The lower four bits of output port 0Fh are used to control the intensity and the selected R, G & B colours for all pixels, in any combination. With 2048 memory bytes, there are 16,384 pixels accounted for in a 128 x 128 pixel array, and the pixels are three CRT beam scanning lines tall. Compare this to colour mode, where each pixel covers six scan lines; three even and three odd. I tried out the 4x resolution mode with a still image. One complication is that the image is divided at the hardware level into four 512 byte blocks, where the addresses are not sequential. So this required processing the image in four blocks. The other complication is the way Cromemco organised one byte to represent four pixels vertically stacked, not as a linear sequence customary in other systems – see Fig.13. I started with a 128 x 128 pixel .BMP monochrome high-contrast image file and cropped it into four separate 64 x 64 pixel files. I then stripped out the 54-byte leader of the .BMP file in a hex editor. The .BMP has three bytes to represent R, G & B, so the actual file size is 12,288 bytes or 12kB (3 × 64 × 64 bytes). This was a manageable size to send to the SOL-20 computer using the serial port, from TeraTerm on the PC to a CP/M program running on the SOL called PCGET, then saved to the SOL’s floppy disk drive. I had previously written software to move disk files to address 4000h in RAM in the SOL, so I modified that. I then wrote custom 8080 software to 1200 Fig.15: output port 0Eh is used to turn the Dazzler’s output on and off, and tell it where in the computer’s memory to find the video data. Because the top 7 bits of the 16-bit address field are stored in the lower 7 bits of this register, setting the base address is a bit confusing. ► VR28), looking at the test pattern on the colour monitor, I measured the red phase delay as 292° (180° + 112°). Fig.12 shows that red should be at 283° (180° + 103°), so it was fairly close. I measured the total delay for the green carrier as 59° (180° + 112° + 127° - 360°), which is pretty close to the 61° (241° - 180°) shown in Fig.12. So the red colour is slightly shifted (9°) towards yellow. Green is very close, and blue (not adjustable) is shifted approximately 13° (360° - 347°) toward magenta. Screen 13 (right): the Dazzler certainly was ‘revolutionary’, Comrade! This is my monochrome test image shown on an amber VDU, which started as a .BMP file. Fig.16: to expand on how the base address is set, in this example, a value of 81h written to port 0Eh sets the base address to 200h (1 × 200), while a value of 82h sets it to 400h (2 × 200). strip out two out of every three bytes, giving a 4096-byte image. It also had to reorder the pixel order, as .BMP starts at lower left and moves to the right then up, while the Dazzler needs data that begins at upper left and ends at lower right. I also had to ‘swizzle’ the image blocks to get them into the right addresses. Fig.14 shows where the Australia’s electronics magazine data needed to be placed in memory, and the three separate pieces of code I used to achieve this from the .BMP file data. Initially, I was perplexed by the instructions to set the starting address of the image in memory using the register (output port) assignments shown in the manual. This is because the bits they refer to in their output port have a September 2021  35 The Dazzler mounted into a SOL-20 computer with external 5.25in drives, and running the CP/M (Control Program/ Monitor) operating system. one-bit offset with respect to the computer’s actual address lines. The best way to explain this is by looking at Fig.15, reproduced from the manual. The MSB here has no counterpart as part of a memory address; it is purely to turn the Dazzler on and off. This means that if you load say 81h into this location, that turns the Dazzler on and tells us that the video data starts at address 200h, not 100h. That’s because the lowest bit in this register is A9, not A8 as you might expect (as elaborated in Fig.16). So this short machine language program: 3E 88 D3 0E 3E 6F D3 0F C3 04 C0 ... loads 88h into output port 0Eh, 36 Silicon Chip setting the image start address to 1000h. The 6F value loaded into output port 0Fh sets the Dazzler to the monochrome resolution 4x mode. The image I had stored in RAM appeared at the Dazzler’s output, as shown in Screen 13 (on an amber monochrome computer VDU). Since the Dazzler was ‘revolutionary’ when it came out, I thought the image was an appropriate choice. The 4x resolution mode can also be a colour mode, with the proviso that all pixels switched on are the same colour (any of the 14 available, not including black). Summary The Dazzler was an astonishing Australia’s electronics magazine creation at the time, and in my opinion, still is. It was designed to bring colour graphics into the world of home computer users who had S-100 computers in the mid-1970s. The Dazzler also found use generating NTSC colour graphics for the television industry, and provided a way to display images derived from early solid-state digital cameras like the Cyclops. The boards’ cost was kept down due to them not having onboard video RAM, instead using the RAM already present in the host computer. You can find some more detail on the Dazzler at: siliconchip.com.au/link/abar https://w.wiki/3nac SC siliconchip.com.au Price Changes For Silicon Chip Magazine From October 31st 2021, the price of Silicon Chip Subscriptions will change as follows: Online (Worldwide) These two Dazzler boards have been almost completely assembled. The jumper wires between the J1-J7 points still need to be run. Once both boards are installed in the computer, they are joined by the ribbon cable with IDC connectors shown at upper right. Current Price New Price 6 Months $45 $50 12 Months $85 $95 24 Months $164 $185 Print Only (AUS) Current Price New Price 6 Months $57 $65 12 Months $105 $120 24 Months $202 $230 Print + Online (AUS) Current Price New Price 6 Months $69 $75 12 Months $125 $140 24 Months $240 $265 Print Only (NZ) Current Price New Price 6 Months $61 $80 12 Months $109 $145 24 Months $215 $275 Print + Online (NZ) Current Price New Price 6 Months $73 $90 12 Months $129 $165 24 Months $253 $310 Print Only (RoW) Current Price New Price 6 Months $90 $100 12 Months $160 $195 24 Months $300 $380 Print + Online (RoW) Current Price New Price 6 Months $100 $110 12 Months $180 $215 24 Months $330 $415 All prices are in Australian Dollars The cover price of the October issue onwards will be $11.50 in Australia. The New Zealand cover price will remain the same at $12.90. The blank boards. Creating these was a lot of work, as the scanned images from the Dazzler manual needed much cleaning up before they could be used for manufacturing. siliconchip.com.au Australia’s electronics magazine SILICON CHIP September 2021  37