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The History of
Transistors
Last month, I described the invention of transistor technology and
some of the early techniques used which were not well suited to mass
production or high performance. This article continues where that
one left off, covering the rapid progress in the 20 or so years between
the first commercial transistor production and the development of
manufacturing techniques that are still in use today.
Part 2: by Ian Batty
T
he first article in this series
described the ‘hand-made’ phase
of transistor construction. Although
some processes were automated, they
were very much made one at a time.
That’s still true of the first few techniques we’re about to look at. Alloying, for example, required each transistor’s indium dots and base slice to
be individually assembled for loading
into the alloying furnace.
The breakthrough came with the
application of photolithography.
Combined with gaseous diffusion,
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this provided all stages of fabrication
apart from terminal and lead attachment. This meant that manufacturers
could automate the manufacturing
process and apply batch processing
to yield many devices from one feedstock wafer/slice, as we shall soon
investigate.
Alloyed-junction transistors
Grown junction technology was
demonstrably superior to point-contact
but could not yield a base of sufficient
thinness for operation much above
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1MHz. The Regency TR-1’s designers
were forced to use an intermediate frequency (IF) of only 262kHz to get reasonable gain.
The alloyed-junction transistor was
invented by John Saby at General Electric, with similar developments undertaken by Jacques Pankove at RCA.
Inventorship had to be established in
the US courts, as RCA had filed on Pankove’s work one day ahead of General
Electric in June 1952.
They were initially PNP types and
commenced with a wafer of N-type
siliconchip.com.au
Fig.22: alloyed-junction transistors were made by adding indium pellets or ‘dots’
on the surface of the N-type (doped) silicon base, then heating the assembly in an
oven until the P-type indium formed an alloy with sections of the base.
germanium, typically doped with
antimony (becoming the base). Some
details of production are set out in Pankove’s patent at https://patents.google.
com/patent/US3005132
The junction transistor was created
by alloying emitter and collector dots
onto the base slice at high temperatures. This design was reliable and
economical to produce. The famous
OC70/71 and OC44/45 series used in
the late 1950s and early 1960s were
all alloyed-junction types.
Alloyed-junction transistors worked
at moderately high frequencies – up
to about 15MHz for the OC44. Point-
contact transistors were still in limited
use, as their highest operating frequencies extended to around 300MHz.
Current flow in a PNP transistor originates at the emitter, crosses
the emitter-base junction, diffuses
through the base, then crosses the
base-collector junction. The slowest
movement is within the base, so the
first area for improvement was to make
the base as thin as possible.
The principal problem with this
was in the alloying process. A typical
transistor began with the N-type base
slice having P-type indium ‘dots’ for
the emitter and collector placed on it.
The assembly was then heated to the
melting point of indium, below germanium’s, forming a eutectic alloy that
combined the indium into the germanium – see Fig.22.
A practical transistor has a base
thickness measured in micrometres;
the base thickness is exaggerated in
Fig.22 for clarity. You can see photos
siliconchip.com.au
of ‘delidded’ germanium alloyed-
junction transistors in Figs.23 & 24,
in which the alloyed indium dots are
clearly visible.
The molten indium penetrated the
germanium base area from either side.
The aim was to alloy the emitter and
collector as closely together as possible
without ‘shorting out’ the base region.
An article extracted from the January 1961 edition of Mullard Outlook (siliconchip.com.au/link/abbi)
describes just how laborious and handmade the OC71 and its fellows were.
The Outlook describes how the collector sites were alloyed first, then the
base slice removed from the furnace,
turned over, the emitter sites placed
and the entire assembly re-alloyed to
complete the transistors.
Raytheon solved the multi-pass
problem by inserting the emitter dot
into a recess in a small graphite ‘boat’,
then placing the base slice, then the
collector dot on top of the base to
complete the ‘sandwich’. The entire
assembly then went through the alloying furnace, creating the transistor in
a single pass.
In practice, base thicknesses of
Fig.23: a delidded transistor from an
IBM 1401 computer. Early versions of
that computer used standard alloyedjunction germanium transistors, while
later versions used faster, diffused
‘drift field’ transistors. Source:
Marcin Wichary, USA (CC BY 2.0)
much less than about 0.5 thou
(0.0005in or about 0.013mm/13µm)
proved difficult to produce reliably.
Philips’ commonly-used OC44, with
its cut-off frequency of around 15MHz,
was bettered only by RCA’s 2N1308 at
30MHz, representing the state-of-theart for alloyed junction transistors.
Many OC45s were simply OC44s
that had not met the OC44 specifications and were marketed as perfectly
good devices with a high-frequency
cut-off of only 6MHz. You’ll see radios
of the time with an OC44 converter and
OC45s relegated to the IF.
Once production was running
smoothly, manufacturers concentrated
on improving important parameters
such as the power rating, maximum
voltage, high-frequency response, temperature stability and noise.
Many valves did not have frequency
ratings, and some turned out to be suitable for use at much higher frequencies than intended, such as the 6BE6
pentagrid operating up to 108MHz in
FM tuners.
On the other hand, junction transistors universally have maximum frequency specifications. This is useful
Fig.24: a small-signal alloyed-junction
germanium transistor suitable for
audio use. Note how the base and
collector leads are insulated from the
metal can while the emitter, hidden
under the wafer slice, connects
directly to the can for shielding.
Image copyright: Jack Orman, www.
muzique.com
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April 2022 39
for designers but also points to the
intensive design and development
efforts that now allow transistor operation up to and beyond 500GHz.
Raytheon’s landmark 8TP portable
radio was the second all-transistor
radio behind the Regency TR-1. But
unlike the TR-1, judged by Consumer
Reports in April 1955 as a “toy that
didn’t come at a toy-like price”, its
performance was quite credible.
The 8TP, like most Australian radios
built in the 1950s, uses PNP types in
the RF/IF section. This is a good indication of alloyed-junction construction as alloyed-junction types are most
easily made using indium-alloying. It’s
possible, but difficult, to create NPNs
using alloying.
Diffused construction
Alloyed-junction transistors were
incapable of working much above
30MHz, a limit easily surpassed by the
less-reliable point-contact technology.
With the physical base thickness
restricted to a minimum of about 10μm
using alloying techniques, designers turned to the question of current-
carrier speed across the base. Four
solutions were found.
The first was to produce a graded
doping concentration from emitter to
collector, the ‘diffused junction’.
The second was to alloy using the
collector as the substrate; the base
was diffused into the collector slice,
and the emitter alloyed into the base
‘surface’.
The third was to chemically etch
a very thin base area for emitter and
collector deposition.
The fourth was to use diffusion to
fabricate the base and emitter over the
collector substrate.
1) Graded doping
Charge carriers must diffuse across
the base-collector junction, and a
uniform doping concentration does
not give the fastest transit time. If
the doping concentration is modified across the thickness of the
base, charge carriers experience less
recombination and get a comparative ‘boost’ in their slow diffusion
towards the collector.
Light doping near the base-collector
junction also reduces the effective
capacitance in that area, thus reducing
collector-base feedback capacitance.
RCA’s drift field process, proposed by
Herbert Kroemer in 1953, was put into
production by 1956.
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Fig.25: graded
doping allowed
for lighter
doping in the
collector area
of the substrate,
forming a ‘drift
field’ transistor
that accelerated
electrons/holes
more effectively,
therefore
improving
high-frequency
operation.
Rather than doping the entire base
slice at manufacture, just one side of
the base was exposed to a doping gas
in a furnace. This caused a high doping concentration on the exposed side,
and progressively weaker doping as
the doping gas diffused through the
germanium base slice.
The resulting doping gradient,
shown in Fig.25, allowed higher-
frequency operation. This method still
relied on physically thin and fragile
base slices, and offered no means of
reducing the active base thickness.
Drift transistors such as RCA’s
2N247 offered cut-off frequencies up
to 60MHz. Even with strict control
of the alloying process, 60MHz was
probably the practical limit for such
construction.
While this technique went no further, it demonstrated that uniform
doping of the base could be dispensed
with, and hinted that the transistor
might be fabricated on one side of the
substrate.
2) Collector substrate
Philips, meanwhile, had extended
the concept of diffusion into the germanium slice. Rather than a two-sided
approach fabricated on a base substrate, they began with a relatively
thick and mechanically robust collector slice.
The first approach was to create a
thin doped layer to diffuse the base
into the collector substrate using diffusion. An emitter ‘dot’ was placed onto
the base surface and alloyed into the
base layer, as Fig.26 shows.
The initial design used a contacting
ring to connect to the base diffusion,
superseded by an alloyed base connection. The base dot was of the same
Fig.26: gas diffusion allowed a very thin surface layer on the wafer to be doped
to N-type while the bulk of the silicon remained P-type. The emitter was then
alloyed on top. This thin base layer provided even higher frequency operation.
Fig.27: a refinement of the scheme shown in Fig.26; here, a base dot is alloyed
along with the emitter. The base dot is N-type material on top of the N-type
diffused layer, so it doesn’t form a semiconductor junction; just a convenient
electrical connection to the base layer.
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Fig.28: another germanium audio
transistor, apparently a diffusion type
as no alloyed dots are visible, and the
wafer slice is so small that it’s mounted
on a stamped steel base to keep the
bond wires short. Image copyright:
Jack Orman, www.muzique.com
polarity as the existing base (N-type
in the OC169~171), the emitter dot of
P-type. Alloying the base dot simply
made electrical contact with the base
layer, but the emitter dot would alloy
into the base, forming the emitter-base
junction, as shown in Fig.27.
This principle is also known as
the Post-Alloy Diffused Transistor
(PADT), as the alloying follows base
diffusion.
In 1957, J. R. A. Beale reported
experimental production with operating frequencies up to 200MHz. In
full-scale production, devices such
as the OC169~171 could operate at
100MHz. The AF118 RF/Video amplifier boasted a cut-off frequency of
175MHz.
Production spreads still existed:
Fig.29: by acid etching the base layer to make it as thin as possible before
adding the emitter and collector, the effective base could be made thinner, thus
speeding up current flow across it. This resulted in more fragile transistors.
transistors were graded for performance at 100MHz, with the best-
performing OC171s intended as RF
amplifiers in the 88-108 MHz FM band.
The OC170 and OC169 were recommended for converter and IF amplifier
service, respectively, and came from
the same production lines.
Further development yielded some
impressive results, with the AF186
posting a cut-off frequency of 820MHz.
A UHF tuner design from 1967 gave
a gain of 22dB with a noise figure of
10.5dB at 860MHz. This was already
superior to competing valve designs,
which principally used a valve local
oscillator and solid-state diode mixer,
but no RF amplifier.
Microwave valves such as the discseal 6BA4 or the ceramic 7077 gave
good RF amplifier performance, but
were not considered practical in
mass-produced consumer electronics.
Even with this level of performance,
the days of alloying were numbered.
The AF186 came in two varieties,
pre-amplifier and mixer-oscillator,
implying that significant manufacturing variabilities still existed. Also,
the entire alloying process was illsuited to high-yielding mass production demands.
Some online sources describe the
previous alloyed-junction construction as “diffused”. Early confusion
over whether the indium-germanium
consolidation was a diffusion or an
alloying process was finally resolved
by John Saby in 1953 (see siliconchip.
com.au/link/abbj).
A true diffused construction relies
on diffusing a doping gas’ doping
concentration into the depth of the
base (or collector) at high temperatures when the base is manufactured.
Against this, alloying relies on the
eutectic process, where the alloy’s
melting point is lower than that of
either constituent, just as tin-lead
solder melts before either tin or lead.
But you can argue that an alloy also
sees mutual diffusion of one part into
the other. Saby recognised this, accepting ‘alloying’ over ‘alloy-diffusion’ for
the alloyed-junction process to distinguish between the older dot on a slice
process and the newer gaseous atmosphere processes being developed (see
siliconchip.com.au/link/abbk).
3) Base-substrate etching
Alloyed designs already used the
thinnest practical base of uniform
thickness, but only the section directly
between emitter and collector needs
to be as thin as possible. Why not
use a suitably thick base substrate for
mechanical strength, then thin out the
area where the emitter and collector
will be formed?
Philco (https://en.wikipedia.org/
wiki/Philco) invented the surface barrier transistor (SBT) and used this technology to build the world’s first solid-
state computer in 1957, the S-2000
Transac. Arthur Varela used precision
etching to chemically erode the base
slice, forming a ‘well’ on either side.
Fig.29 shows how the etching created the thin base region, then transformed into a plating process, with
the emitter and collector regions being
plated onto the base surface. Devices
such as the 2N240 could operate up
to 30MHz. See also Fig.30.
Fig.30: a page from US patent 2,885,571 shows how acid etching makes the base
extremely thin, speeding up the transistor.
siliconchip.com.au
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April 2022 41
Fig.31: the diffusion process for making diodes. Variations on this process could
be used to add a third layer for making transistors.
Impressive as the SBT was, it still
relied on highly precise manufacturing that was not easily adapted to automated, high-volume mass production.
Additionally, the very thin base was
still mechanically weak, so the device
was prone to damage from vibration
or shock.
The similar micro-alloy transistor
(MAT) enjoyed a brief appearance,
especially in England, where Technical Suppliers Limited and Clive
Sinclair’s Sinclair Radionics offered
these devices. Notably, the TSL catalog shows MATs with cut-off frequencies of 75MHz, but a competing
alloy-
diffused device with a cut-off
of 400MHz.
4) Micro-alloy diffusion
If diffused-base technologies such
as the drift-field allowed operation up
to 60MHz, why not apply diffusion to
a very thin base? Would this improve
the performance of the surface-barrier
design? Philco engineers addressed
this problem, applying etching techniques to a diffused base: the micro-
alloy diffused transistor (MADT).
As noted above, the entire base does
not need to be extremely thin, only the
section between emitter and collector.
The 2N502A MADT could oscillate up
to 500MHz.
Micro-alloy diffusion works by
using diffusion techniques to create a
doping gradient through the base that
promotes rapid charge motion from
emitter to collector. ‘Wells’ are then
etched into the base slice to form the
thinnest possible base section between
emitter and collector. Finally, the emitter and collector surfaces are ‘plated’
into the base wells, ready for lead
attachment.
All-diffusion techniques
The previous fabrication methods
(especially those using etching) could
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not make good use of high-volume,
automated manufacturing techniques.
Two solutions were found: mesa
and planar processes, each allowing
hundreds of transistors to be made on
a single semiconductor wafer/slice in
one go. That slice was then cut apart
to yield individual transistor ‘chips’
ready for testing and packaging.
Also, if devices other than transistors could be fabricated on a wafer and
interconnected, it would be possible
to create many individual, functional
circuits on a wafer. Finished circuits
could be tested in place, the good ones
cut and packaged, and the rejects discarded. But that would come a bit later.
The key to this revolution was photolithography (https://patents.google.
com/patent/US2890395A), a refinement of the photographic techniques
used to make printed circuit boards
(PCBs). Paul Eisler’s 1943 patent application (GB639178) for the PCB became
the basis for proximity fuse design in
anti-aircraft shells.
Post-war declassification was followed by Moe Abrahamson and Stanislaus Danko’s patent, granted in 1956
(https://patents.google.com/patent/
US2756485A) – see the last page.
Mesa fabrication
Working at Texas Instruments, Jack
Kilby developed the monolithic (‘single stone’) mesa process. Mesa construction (named for flat-topped tablelands of south-western USA) began
with a substrate slice of doped silicon,
let’s say N-type.
The substrate (commonly known as
a wafer) was placed in a furnace and
exposed to a P-type doping gas. This
created a P-type layer over the entire
surface of the substrate, forming a single diode junction (see Fig.31). At this
point, the slice could be cut up into
chips, each being one P-N diode.
Photolithography
The photolithographic process
allows the creation of individual
Fig.32: this is an example
of how a circular slice
of silicon (or germanium)
crystal could be made into
many separate diode dice using
photolithography and acid etching.
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Fig.33: the Mesa process was an early photolithographic transistor production method with important advantages.
doped ‘islands’ on the slice rather than
a continuous doped surface. Fig.32
shows an example mask applied to a
germanium/silicon wafer.
The key to the process is a photosensitive resist. This chemical responds
to ultra-violet light by hardening and
adhering to the surface it is applied
to. Exposed resist will remain in place
during processing, while unexposed
resist (covered by opaque parts of the
mask during UV exposure) is easily
washed off to permit the doping atmosphere to diffuse into exposed areas
of the wafer.
Beginning with a wafer that has
been processed to create a single large
P-N junction, the slice is resist-coated,
masked and exposed to ultraviolet
light. The light not obscured by the
mask passes through and hardens the
resist layer. The unexposed resist is
then washed off, leaving a protective
pattern over the slice. This process is
shown in Fig.33.
The slice is then exposed to an etching acid so that the unprotected areas
of the slice are dissolved, removing
the P-type layer in the exposed areas.
Precision control results in the desired
P-type ‘islands’ over the surface of the
N-type substrate.
The etching creates side trenches,
separating each ‘island’ from its neighbour, and giving the distinctive ‘Mesa’
profile.
Finally, the resist layer is removed
from the entire slice, and it is cut up
to yield Mesa diodes.
This process can be automated,
with the slice never leaving the production line’s controlled atmosphere.
This eliminates the possibility of
surface contamination, giving much
higher consistency and reliability.
The example mask in Fig.32 would
produce 160 diodes in one production run. In reality, 1969s standard
siliconchip.com.au
two-inch wafer/slice produced hundreds of diodes.
Making mesa transistors
The process for making transistors
is similar, but naturally, it is a little
more complicated. First, a fresh substrate is placed into a furnace and the
entire surface is exposed to a doping
gas, making a single P-N junction, as
before. The next stage is to take the
entire slice and coat it with resist, just
as for the diodes.
But this mask contains smaller
holes – each one overlaying a part
of the previously-doped P-type base
material where the exposed area is to
become the emitter of a transistor. UV
exposure hardens the resist layer, and
the unexposed portions are washed
off. The slice is exposed to an N-type
doping gas in the furnace, changing
the exposed P-type silicon base areas
to N-type doping, creating the small
emitters.
We now have an N-P-N structure.
Finally, the edges of the useful area
are etched to isolate each transistor
from its neighbour (similar to Fig.33)
and ensure that the N-type substrate is
isolated from the collector around the
edges – just like the diodes.
The transistor has been made with
two diffusion processes – first the base,
then the emitter into the formed base
area. Thus, this type of transistor is
known as double-diffused.
Mesa’s double-diffusion can be conducted in a single pass through the
furnace. Beginning with an N-type
substrate, aluminium vapour (a light,
rapidly-diffusing acceptor impurity)
can be made to diffuse and create
the P-type base, a layer only 0.0001
inches or about 2.5µm thick. That’s a
bit less than four wavelengths of visible red light.
Simultaneously, and in the same
atmosphere, a more slowly-diffusing
antimony donor impurity penetrates
less deeply, following the aluminium
diffusion, overcoming and reversing
the aluminium’s acceptor doping.
This creates a shallower N-type emitter layer extending from the surface
into the base region.
Consider the astounding precision
of control needed for this process and
the fact that the substrate stock’s purity
is measured in parts per billion. That’s
why the Mesa process (and its successor, planar, described below) took so
many thousands of laboratory hours,
so many millions of dollars and so
many years to reach perfection.
Fig.34 shows a simplified example
of a NPN transistor of Mesa construction. Notice the etched side ‘trenches’
that isolate the collector-base junction.
Fig.34: this is how
a transistor made
using the Mesa
process looked
when finished. The
name comes from
its distinctive shape,
like a desert mesa.
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April 2022 43
Input 1
Output 1
B+
Earth
Output 2
Input 2
Mesa/double-diffused construction
gives great improvements in yield:
many individual devices can be fabricated on a single germanium or silicon
slice, and the high-precision nature
of photolithography allows for the
creation of much smaller individual
devices. Although the illustration does
not show it, Mesa devices can also use
epitaxial construction, described in
the next section.
A parallel development allowed
robotically-controlled, microscopic
probes to examine and test each finished device on the slice. Faulty or
below-standard devices would be
Fig.35: a photo of
the first commercial
integrated circuit,
Fairchild’s µL902
flip-flop from 1961.
It was made using
a similar process
to the epitaxial
planar technique,
with more complex
lithographic masks
to create the four
transistors and their
interconnections.
Source: Fairchild
recorded in computer memory and
rejected once the slice was scribed
and broken up to produce individual
devices.
Mesa technology drove costs down
and yielded devices with greater reliability and performance figures. Texas
Instruments advertised their germanium 2N623, with a maximum oscillating frequency of 200MHz, in July
1958. By March 1959, TI’s 2N1141
could operate to 750MHz.
While this performance is about
equal to the best alloy-diffused transistor, the process delivers higher yields
and is therefore more economical.
Although surpassed by its planar
successor for high-frequency use,
Mesa technology is still widely used
for high-power transistors.
At about this time, Jack Kilby pioneered integrated circuits by fabricating several devices onto one germanium “chip”, forming a simple digital
circuit. Those devices still relied on
fine interconnecting wires between
the devices. He was awarded the Nobel
Prize for Physics in 2000.
Despite Kilby’s invention being
regarded as ‘the first’ integrated circuit,
Kilby does not have absolute priority
(https://patents.google.com/patent/
US3138743A).
Harwick Johnson filed a patent in
1953 for an analog phase-shift oscillator in a “unitary body” that we would
recognise as an integrated circuit.
Johnson’s device did not rely (as Kilby’s did) on manually-placed interconnecting wires to complete the device
(https://patents.google.com/patent/
US2816228A).
Six months later, Robert Noyce,
one of the “Fairchild Eight”, perfected integrated circuit design by
vapour-depositing metallic wiring
interconnections over the chip surface, creating a device that could be
Fig.36: the planar epitaxial diode manufacturing process, which can be considered the direct predecessor of many
Fig.37: epitaxial planar transistor manufacturing starts with the output of the diode process and repeats essentially the
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made entirely automatically. Noyce
(in contrast to Kilby) used silicon,
starting the IC revolution that has
given us everything from supercomputers to smartphones with cameras
(see Fig.35).
Planar transistors
The final phase of development
coincided with the implementation of
fully automated fabrication. As mentioned in part one, ideally, the base of a
transistor should be as thin as possible
for the highest frequency of operation.
But the base still needs an electrical
contact made to it, and such contacts
have practical size limits.
Mesa technology used edge-etching
to define the edges of the junctions,
potentially exposing the junctions to
contamination. The collector should
also ideally have excellent conductivity (for the least possible electrical
resistance and best high-frequency
performance), but this demands doping too heavy for practical devices,
as it gives very high collector-base
capacitances.
A very thin collector with light doping would give the desired low resistance and low capacitance. But, as
this would be too fragile for practical
devices, some compromise was always
forced on designers.
Epitaxial planar
Howard Christensen and Gordon
Teal’s 1951 patent solved the thickness/resistivity problem by showing
how to grow a very thin and lightly
doped semiconductor layer over a
more heavily-doped thicker substrate
(https://patents.google.com/patent/
US2692839A).
Jean Hoerni’s patent of March 20th
1962 demonstrated an advance on Mesa
technology: epitaxial planar manufacture, using Christensen and Teal’s epitaxial process (https://patents.google.
com/patent/US3025589A).
The epitaxial (“arranged around”)
layer has an identical crystalline structure to the substrate, but can have any
degree of doping concentration and
even the opposite doping type. This
remains essentially the state-of-theart for semiconductor manufacture to
the present day.
Like the Mesa process, Hoerni’s
technique uses double-diffusion: base
into collector, emitter into base.
Fig.36 shows the manufacturing of
diodes with this technique. A lightly-
doped N-type epitaxial layer is grown
over the N-type substrate using gaseous diffusion – basically, a form of
controlled condensation.
The substrate is coated with photo-
resist, then masked. Ultraviolet light
shines through the mask, hardening
the exposed resist layer. The unexposed resist is washed off, and the
slice is exposed to a P-type doping gas
to form a diode. After washing off the
exposed resist, the anode and cathode
connections are made, and the diode
is complete.
This gives the desired thin, lightly-
doped layer needed for when the process continues to manufacture transistors (as shown in Fig.37). It has a
low-capacitance junction in contact
with a sturdy and highly conductive
layer below.
Beginning with the diode structure,
the slice is resist-coated, masked and
UV-exposed to leave part of the existing P-type diffusion unprotected. After
washing off the undeveloped resist,
the slice is exposed to N-type doping,
which diffuses into the base. This gives
the N-P-N structure for a transistor.
Finally, the entire surface is oxidised to form a silicon dioxide protective surface. This oxidation phase
makes epitaxial planar manufacturing
modern transistor manufacturing processes.
same steps to add the third (emitter) layer.
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April 2022 45
Fig.39: a Fairchild ►
epitaxial transistor
die. The star
shape conferred
some performance
advantages over
a circle. Source:
Fairchild
Fig.38: a finished epitaxial planar transistor. The silicon dioxide (SiO2) layer on top
insulates the transistor and provides a barrier against moisture and contaminants.
This allows the transistor to be housed in a low-cost plastic package.
unsuited to germanium devices: germanium oxide is soluble in water and
fails to form a protective layer. A final
masking-etching step produces small
apertures in the SiO2 mask to allow
metallisation for emitter and base contacts, as shown in Fig.38.
Alternatively, it’s possible to diffuse
directly through the SiO2 layer to make
contact with the desired areas.
The active device now has a thick
substrate for strength with low resistance, a collector layer with the desired
lighter degree of doping needed for
transistor action and low collector
capacitance, a diffused base layer and
an emitter layer diffused into the base.
This leaves a base layer of the desired
thinness for the intended maximum
operating frequency.
The collector contact is made to the
collector substrate. Individual transistors are robotically tested, the slice is
broken up, ‘good’ chips are selected
and encapsulated with connecting
leads attached. The SiO2 passivation
layer’s robustness makes encapsulation in cheap epoxy resin possible; germanium Mesa devices needed metallic
casings to guarantee hermetic sealing.
Fairchild released their 2N709 in
March 1960, with a maximum operating frequency of 600MHz. The 2N709A
pushed this to 900MHz.
A final advantage of photolithography is the ability to create devices
of any geometry. Simple circular
cross-section devices do not give the
best RF performance, especially at
high power levels. Mesa and planar
devices can use complex geometries
unobtainable by previous processes.
Fig.39 shows a microscope photograph
of a star-shaped Motorola epitaxial
2N2222 transistor die.
46
Silicon Chip
Note that all illustrations in this
(and the previous) article significantly exaggerate the base thickness
(and emitter, in some cases). In practice, base thickness is measured in
micrometres.
Several fine publications have
attempted to give some impression of
the true scale of fabrication, but the
results are difficult to interpret because
of their attempted fidelity. Fig.40 is an
original alloy-diffused diagram from
Mullard’s Reference Manual of Transistor Circuits (at approximate full
size here), illustrating the problem of
accurate visualisation.
Silicon’s advantages over
germanium
Germanium’s relatively low melting
point of 940°C made it the material of
preference for point-contact and early
junction transistors, but it has fallen
into disuse for several reasons.
Silicon NPN and PNP annular
epitaxial transistors ... Designed for
complementary high-speed switching
applications and DC to 100 mc amplifier
applications.
First, the collector-base junction
proved to have significant reverse
(leakage) currents even with no forward base bias applied, meaning that
the transistor could never be truly cut
off. These leakage currents worsened
at elevated temperatures.
While this might be tolerable in
diodes, leakage in transistors could
lead to rapid increases in collector
current. Such increased current causes
increased heating, causing increased
leakage, causing increased heating...
this is thermal runaway. Think of a
1960s car radio in the middle of summer; cabin temperatures could easily
exceed 50°C.
In a power transistor, the device
can rapidly increase its current from
its desired bias value (of milliamps)
to a current of many amps and be
destroyed by overheating. Circuit
designs must stabilise the transistor
against such current variations. Also,
Fig.40: this diagram from Mullard attempts to show the features of a transistor
at actual size, making some of the details such as the base layer hard to see,
as they are so thin compared to everything else. Source: Mullard Reference
Manual of Transistor Circuits, 1960
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germanium junctions can only operate
to about 70~90°C while silicon devices
are commonly specified up to 200°C
(although 175°C is more typical).
One early car radio was notorious
for its OC72 germanium output transistors overheating and being destroyed.
Silicon junctions exhibit much
lower leakage currents, giving better
performance, especially at high power
levels and high temperatures. Thermal
runaway must still be considered, but
it is far less of a problem with silicon.
Also, silicon is much more plentiful.
If you’ve ever rinsed sand out of your
bathers, you’ve rid yourself of the raw
material for thousands of transistors
and many microprocessors!
Germanium is a rare element. Back
in the 1950s, germanium ore was so
scarce that one transistor manufacturer
was forced into recovering germanium
from the flue ash of power stations. It’s
still scarce, as expressed by its 2018
price of some $2600/kg, with pure silicon costing as little as $50/kg.
Silicon’s advantages are somewhat
counterbalanced by its much higher
manufacturing temperatures (almost
1400°C) and the difficulties of adapting germanium manufacturing techniques. Impurity doping methods that
worked well with germanium had to be
modified. For this and other reasons,
early silicon transistors performed
poorly at high frequencies.
Parallel advances in mass production techniques gave them an initial
cost advantage, however. Once begun,
silicon processing developed rapidly.
Silicon did offer one major manufacturing advantage over germanium:
the oxide of silicon (basically, glass) is
highly insulating and resistant to liquid or gaseous contamination. Silicon
devices could be ‘finished’ with a final
layer of SiO2, creating localised hermetic sealing, greatly improving reliability and allowing encapsulation in
cheap epoxy resins. Germanium dioxide lacks these properties.
Early silicon transistors offered little performance improvement over
germanium types. Still, manufacturers focused their efforts on improvement, finally offering devices superior
in every parameter except for base
bias voltage: about 0.6~0.7V for silicon compared to 0.15~0.25V for germanium. This single advantage was
insufficient to outweigh germanium’s
disadvantages.
Gordon Teal somewhat mischiesiliconchip.com.au
vously sprang TI’s first silicon transistors on an amazed IRE National Conference in Dayton, Ohio in 1954. TI’s
silicon devices rapidly supplanted
germanium types. This advance contributed to the total collapse of Philco’s
and Raytheon’s transistor divisions,
as they could not rapidly shift from
germanium feedstock and processes
to silicon.
Growing from a humble electrical
company founded in 1892, Philco
became a supplier of batteries for
first-generation electric vehicles in
1906 and was the creator of the first
all-transistor portable television and
the world’s first all-transistor computer. Despite landmark aerospace and
computing contracts, Ford bought out
Philco in 1961 and ceased to exist as
an independent corporation.
By the 1960s, silicon had become
the dominant material for semiconductor fabrication.
A final ‘wrinkle’ in the story is that,
for alloyed germanium, the PNP structure is optimal, but for silicon planar,
it’s NPN! Now we know why all those
germanium Philips transistors in our
junk boxes need a negative battery
supply, and why their silicon cousins need the opposite. Simply, it’s all
about doping.
Why not tetrode construction?
All modern transistors, aside from
dual-gate FETs, are triodes (ie, they
have three terminals). Compare this
to valves where triodes gave way to
tetrode and then to pentodes in amplifying circuits.
Junction transistors are built from
three distinct layers – emitter, base,
collector – and the device current
originating from the emitter must pass
through the base layer to arrive at the
collector. This current path is equivalent to that of a thermionic triode,
where the cathode current must pass
through the grid to reach the anode.
Field-effect transistors have no
‘intermediate’ electrode between the
source and drain. Source current
passes directly along the channel, but
is influenced by the electrical bias field
from the gate.
Part of the reason behind the popularity of tetrode and pentode valves
has to do with two principal limitations of thermionic triode operation.
First, the proximity of the anode
to the grid created significant capacitance that limited triode performance
at high frequencies. This problem was
eventually solved by the addition of
the screen grid, creating the tetrode.
A valve tetrode’s electron stream
simply passes through the screen’s
thin wire helix. Such screening construction proved impractical with
junction transistors, so the problem of
collector-base capacitance could not
be eliminated. Designers had to work
to reduce the existing collector-base
capacitance to the lowest possible
value instead.
Tetrode transistors were made, but
they still possessed only two junctions, as shown in Fig.41. The extra
connection went to the opposite side
of the usual base contact.
Applying a repelling bias to the B2
connection forced charges away from
that side, narrowing the flow of charge
carriers. In effect, the active junction’s
area could be controlled electrically.
Fig.41: dual-base or ‘tetrode’ transistors were created early on to overcome some
limitations of the transistor technology of the time. But since then, other ways
have been found to improve the transistor’s performance. So except for a few
dual-gate Mosfets or Mosfets with separate substrate connections, pretty much
all modern transistors have three terminals.
Australia's electronics magazine
April 2022 47
This improved high-frequency performance; the amount of internal resistance in the electrically-smaller base
slice was reduced, as was the base-
collector capacitance.
Tetrode transistors enjoyed a brief
period of implementation but were
overtaken by improvements in ‘triode’
designs, and are now obsolete.
The second reason for using the
screen grid in valve amplifiers was to
achieve much higher voltage gain than
triodes could provide. That was a discovery made after the primary aim of
reduced anode-grid capacitance had
been achieved.
Thermionic triode voltage gains are
limited by the fact that the anode voltage affects anode current; lower anode
voltages mean lower anode currents.
The ratio of grid control of anode current to anode control of anode current
is the valve’s amplification factor, its
mu (µ).
Valve voltage amplifier triodes have
µ values from around 3 to 100, with
the ‘negative feedback’ effect of anode
voltage forbidding any higher practical gain. Even early tetrodes gave µ
values of several hundred or more,
and the 6AU6 pentode can give a µ as
high as 5000.
The screen grids of tetrode and pentode designs eliminate the ‘feedback’
effect of anode voltage; anode current
remains virtually unchanged with
changing anode voltages. This can be
expressed in either of two ways: the
valve appears in-circuit as a very high
resistance, acting as a constant current
device, and the characteristic curves
are virtually flat above some 20% of
normal operating voltage.
Transistors, both junction and
field-effect, all exhibit ‘pentode’,
constant-current characteristics as
amplifiers. Changes in collector (or
drain) voltage have little effect on current. Transistor output resistances or
impedances range typically from tens
to thousands of kilohms.
Such characteristics mean that, even
if a screen layer could be added, it
would deliver little extra in the way
of gain. Mullard detail a (triode) OC70
circuit with a voltage gain of 330; about
the same as available from the 6AU6
pentode valve (Mullard Reference
Manual of Transistor Circuits, 1960).
from output back to input).
Field-effect transistors (FETs)
JFETs (junction FETs) and Mosfets
(metal oxide semiconductor FETs) are
important types of transistors and will
be covered in some detail in the following article next month.
Why are they called
“transistors”?
Many references state that the name
“transistor” is a combination of ‘transFeedback in transistors
fer/transconductance’ and resistor.
As triodes, junction transistors However, a May 28th, 1946 survey
exhibit considerable collector-base conducted by Bell Labs offered “a discapacitance, and this has the same cussion of some proposed names”. The
circuit effect as for valves – reduc- list encompassed the awkward (“surtion of input impedance and poten- face state triode”) and the whimsical
tial oscillation.
(“iotatron”).
The first-generation alloyed-
The successful candidate, “transisjunction transistors suffered particu- tor” was “an abbreviated combination
larly from collector-base capacitance. of the words ‘transconductance’ (or
OC44/45 specifications show feedback ‘transfer’) and ‘varistor’” – see www.
capacitances of some 10pF. Given that beatriceco.com/bti/porticus/bell/pdf/
valve triodes proved unworkable with transistorname.pdf
these kinds of capacitances, how were
Some other sources differ on just
transistor triodes used?
how the name was arrived at, but this
Transistor base-emitter junctions at least seems credible.
are forward-biased. This means that
transistors present a very low input Summary
impedance. At audio frequencies, the
Solid-state devices had been demonOC44 has an input impedance of some strated before the start of the 20th cen2.5kW. This low impedance reduces tury and were well-known by 1920.
the effect of collector-base feedback, Julius Lilienfeld patented the two
and such feedback has little effect at types of amplifying devices that we
audio frequencies.
now recognise as transistors in the
In RF/IF amplifiers, collector-base mid-1930s. His patents were not comfeedback can be so severe as to reduce mercialised, though the Bell Laboratogain or provoke oscillation. The
ries team referenced them, and Lilienunwanted in-circuit feedback is com- feld’s patents did forestall some lines
plex due to combined capacitive and of enquiry at Bell Labs.
resistive effects. The most thorough
Building on the development of
designs add external components to microwave diode detectors during
provide unilateralisation – a fancy World War II, a Bell Laboratories team,
name for “single-direction” (signal including John Bardeen and Walter
flow is only from input to output, not Brattain and led by William Shockley, published details of the point-
contact transistor. The device showed
the practicalities of solid-state design,
but it was difficult to manufacture,
fragile and unusable in some circuit
configurations.
Slightly in advance of Bardeen and
Brattain, Welker and Mataré (working in France) released the Transistron, which was successfully taken
up by French telecommunications
companies.
Fig.42: a Mosfet is similar to a JFET, but instead of using a reverse-biased PN
Shockley had not been named on
junction to isolate the gate from the channel, it uses an extremely thin layer of
the landmark Bell Labs’ patent. His
semiconductor oxide. The gate's electric field typically enhances electron/hole
inventive spirit drove him to develop
flow in the channel when applied; it is pinched off otherwise. These are thus
and patent the junction transistor – the
known as ‘enhancement mode’ devices. More on Mosfets next month.
48
Silicon Chip
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siliconchip.com.au
device we now universally recognised
as the transistor. But Shockley’s patent was a theoretical paper, showing
the principles but not the manufacturing details.
The first grown-junction transistor
created a single crystal device that
exhibited much more stable, predictable and reliable characteristics than
point-contact designs. However, it suffered from poor high-frequency operation due to its thick base layer.
The alloyed junction design, using
much more controllable doping by diffusion at near melting-point temperatures, offered much thinner base layers
and could operate to 30MHz. This was
improved on by the drift-field design,
which employed graded doping across
the base and pushed frequency limits
to 60MHz.
The alloy-diffused design abandoned the two-sided construction of
all types so far, building the transistor over the collector substrate. The
base was diffused into the collector,
followed by emitter alloying into the
base layer.
The Mesa design further developed
the all-diffusion process.
The final design – epitaxial planar
V
– uses a thin, lightly-doped epitaxial layer over a heavily-doped substrate giving low resistance; together,
these form the collector. The base and
emitter are diffused into the collector
substrate. Photolithographic masking
allows transistors to be fabricated to
tiny sizes, with outstanding reliability
and reproducibility.
The first transistors were fabricated
in germanium. Germanium’s temperature sensitivity, leakage, scarcity and
its oxide surface’s solubility led to its
replacement by silicon as a feedstock.
Although alloyed silicon processing
was initially more difficult to engineer,
its advantages over germanium have
seen germanium phased out.
References/links
• The most comprehensive and best
single collection of references available (created by Mark P. D. Burgess):
siliconchip.com.au/link/abcj
• A replica and description of the
first transistor: siliconchip.com.au/
link/abce
• A fine general history of transistors:
siliconchip.com.au/link/abcf
• A detailed description and analysis
by van Zeghbroeck: siliconchip.com.
au/link/abcg
• On diffused transistors generally:
https://w.wiki/4fiz
• Early History of Transistors in Germany, Herzog, R., 2001: siliconchip.
com.au/link/abch
• Transistor Production Techniques
Next month
at RCA, Fahnestock, J. D. ElectronThis article has described the tran- ics, October 1953: siliconchip.com.
sistor mass-production techniques au/link/abci
that are still in use today. The follow- • RCA Transistor Manual 1964, Radio
ing article will explain in more detail Corporation of America
how a transistor works, including • Crystal Fire, Riordan, M., and Hodbipolar transistors as well as field- deson, L., W. W. Norton and Company,
effect transistors (FETs). It will also ISBN 13:978-0-393-31851-7
give some pertinent performance
• History of Semiconductor Engicharacteristics, including a descrip- neering, Lojek, B. Springer-Verlag
tion of the limitations of transistor Berlin Heidelberg, ISBN-13 978-3SC
performance.
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