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> THE HISTORY OF COMPUTER MEMORY > THE SILICON YEARS PART 2 BY DR DAVID MADDISON Last month, we described the memory systems that early computers used, from punched paper cards to magnetic drums and tape, core memory, delay lines, special vacuum tubes, cathode ray tubes and more. As we shall investigate, most of those are now obsolete, replaced with silicon-based memory. HE TURNING POINT T WAS AROU N D 19 65. Very small transistorised memory chips started to become available then; just a couple of bytes at first, then a kilobyte, then a few kilobytes… the rest is history. The two primary technologies that emerged were SRAM and DRAM, but we’ll look into others too, like EPROM, EEPROM, flash, SGRAM and more. Picking up where we left off last month: 1965 Scientific Data Systems and Signetics produced an 8-bit (one-byte) memory device. Later in the year, Ben Agusta and Paul Castrucci developed the SP95, a 16-bit (two-byte) RAM device used in the IBM System/360 Model 95. 1966 Tom Longo at Transitron built the TMC3162 16-bit TTL memory (see Fig.24). This became the first widely produced RAM chip and was also produced by Fairchild (as the 9033), Sylvania (SM-80) and TI (SN7481). You can view the data sheet for the latter at siliconchip.au/link/abhv Honeywell used that chip in their Model 4200 minicomputer. Following that were 64-bit (eightbyte) chips such as the IBM cache memory chip, Fairchild (9035 and 93403) and TI (SN7489); see the data sheet at siliconchip.au/link/abhw 1967 Robert Dennard of IBM filed for US Patent 3,387,286, awarded in Fig.24: the metal mask from the Fairchild 16-bit bipolar TTL RAM IC. Source: Fairchild Camera & Instrument Corporation, www. computerhistory.org/siliconengine/ semiconductor-rams-serve-highspeed-storage-needs/ Fig.25: an illustration from Dennard’s 1968 patent, showing a 9-bit DRAM memory element with nine transistors and nine capacitors. 14 Silicon Chip Australia's electronics magazine siliconchip.com.au Early programs that were run more than once? Fig.26: a labelled silicon die from a 1970s 1024-bit MMI 5300 PROM chip. Source: Ken Shirriff, www.righto.com/2019/07/looking-inside-1970s-promchip-that.html 1968, for a one-transistor DRAM cell (Fig.25). Memory based on this technology displaced magnetic core memory. The differences between DRAM and SRAM (both still in use today, for different applications) will be described later. 1969 the PROM (Programmable Read-only Memory) was invented in 1956 for the US Air Force to keep targeting data in ICBMs. However, the technology was kept secret for over a decade. The PROM is a memory device that can be written only once; after that, the data can no longer be changed (Fig.26). Applications for these devices, which are still used today, include encryption keys, configuration and calibration data in equipment and boot code in computers. It was not initially in the form of an integrated circuit, which wasn’t invented until 1958 (or 1960 for planar devices) – for more details on that, see our articles on IC Fabrication in the June-August 2022 issues (siliconchip. au/Series/382). Programming is done by “blowing” fusible links such as metal links, diodes or breaking down the oxide layer between the gate and substrate in a transistor with a relatively high voltage (eg, 6V) pulse. PROM devices weren’t implemented in CMOS technology until 2001. 1969 Charles Sie published a dissertation on Phase Change Memory (PCM, also known as PRAM), originally conceived by Stanford R. siliconchip.com.au Ovshinsky. A substance such as chalcogenide glass is changed between its crystalline and amorphous (glass-like) phase by applying heat at an appropriate fast or slow rate from a heating element – see Fig.27. Each phase has a different resistivity. PCM has a much higher write performance and comparable read performance to flash memory. There have been many attempts to commercialise PCM devices; despite some product demonstrations and some devices being released onto the market between 2004 and 2014, they have yet to be commercially successful. Intel 3D XPoint memory is an example of PCM. Their “Optane” products It was once related to me by an older colleague that in the very early days, computers were not as reliable, nor did they have the multiple self-checks they do today. Electrical noise could introduce incorrect information, eg, by flipping a bit. It was therefore not uncommon to run science and engineering programs, and presumably others, two or three times to ensure the same answer would be obtained. However, I have found no corroboration of this elsewhere. We would be interested to hear from readers who may have heard of this. were introduced in 2017 and proved reasonably popular among some users, being faster than flash-based SSDs, but Intel discontinued development in 2021. Chalcogenide glass is also used in rewriteable optical media such as CDs and DVDs. 1969 Intel introduced its first product, the 3101 Schottky TTL bipolar 64-bit static random-access memory (SRAM) – see Figs.28 & 29. It could store 64 bits of data or eight 8-bit characters. It was twice as fast as the previous silicon memory products mentioned above (IBM cache, Fairchild 9035 and 93403, TI SN7489) due to its use of schottky diodes. Fig.27: phase change memory structure, with the left-hand cell in a crystalline state and the right-hand cell in an amorphous state. Original source: https://w.wiki/5zxP (GNU FDL) Australia's electronics magazine February 2023  15 D2 O1 D1 WE O2 CS A0 GND Vcc O3 A1 D3 O4 D4 A3 A2 Fig.28: a die photo of Intel’s first product, a 64-bit memory chip from 1969. Source: Ken Shirriff, www.righto.com/2017/07/inside-intels-first-product-3101ram.html Fig.29: two variants of the Intel 3101 IC. Source: Ken Shirriff, “inside Intel’s first product” Its memory capacity was insufficient to compete with the magnetic core memory of the time. Still, it was very fast, so it was useful in CPU registers. 1969 The Intel 3301 1024-bit ROM (read-only memory) was introduced. 1969 IBM produced a 128-bit memory chip for the System/370 Model 145, the first IBM computer to use semiconductor main memory. 1969 Fairchild produced the 4100 (aka 93400) 256-bit memory chip for the Burroughs Illiac IV computer. 1969 The Intel 1101 was introduced. It was a 256-bit SRAM, the first to use MOS (metal oxide semiconductor) technology, leading the way to high-density devices. 1970 Intel introduced the first These devices are easy to recognise as they have a transparent window over the silicon die, usually covered by an opaque sticker. That was to stop accidental erasure by stray light sources such as fluorescent lamps or sunlight. They were used to store the BIOS (built-in operating systems) of early IBM-compatible PCs and many other devices as there was a periodic requirement to update low-level program code or ‘firmware’. At the time, there was no other form of chip-based non-volatile memory, and computer boot processes were time-consuming. Intel founder Gordon Moore said the invention of the EPROM was “as important in the Read/Write Drivers Decode Storage Cells Address Drivers commercially-available DRAM (dynamic random-access memory) IC, the 1103, with one kilobit (1024 bits) of memory – see Figs.30, 31 & 32. This chip was significant because it was sufficiently small and cheap to provide a viable alternative to magnetic core memory. 1970 The EPROM was invented by Dov Frohman with US patent 3,660,819 awarded in 1972. An erasable programmable read-only memory is a device that can be electrically programmed and retains its memory for many years, but can be erased when needed using ultraviolet light. It is a form of non-volatile memory and retains its data with no power applied. Fig.31: a die photo of the Intel 1103 1-kilobit DRAM. Source: www. cpu-galaxy.at/ cpu/Ram%20 Rom%20Eprom/ RAM/Intel%20 1103%20section. htm Fig.30: the 1972 HP 9830A programmable calculator/computer with optional thermal printer used Intel 1103 1-kilobit memory chips. Source: Hydrargyrum, https://w.wiki/5zxQ (GNU FDL) 16 Silicon Chip Australia's electronics magazine siliconchip.com.au development of the microcomputer industry as the microprocessor itself”. 1971 The Intel 4004 4-bit microprocessor with 2300 transistors was released. This device led to the revolution in microcomputers, creating a huge demand for bigger and better memory. The 4004 was followed by the 8-bit 8008 microprocessor in 1972 and eventually the 8086 in 1978, the predecessor to the x86 architecture that is in widespread use today. 1971 Bill Herndon at Fairchild designed a fast 256-bit TTL memory (the 93410). 1972 The first EPROM was released onto the market, the Intel 1702, with a 2048-bit capacity (see Fig.33). 1972 The EEPROM was invented by Fujio Masuoka of Toshiba, who later created flash memory in 1984. EEPROM or E2PROM (electrically-­ erasable programmable read-only memory) is much like EPROM. It is a form of non-volatile memory, but instead of being erased with UV light, it is erased electrically, making it much simpler to use. In fact, these devices are the precursors of flash memory. EEPROMs are still used in devices such as embedded microcontrollers, phone SIM cards, bank cards, keyless entry systems, security devices and so on. When used in security devices, they usually have some sort of read, write or copy protection. One difference between EEPROMs and flash memory is that an EEPROM requires two transistors per bit for erasure, while flash memory requires only one. Thus, an EEPROM chip of the same capacity is larger than flash memory. However, an EEPROM can erase single bytes, but flash memory must erase entire blocks of data. EEPROMs can usually handle being rewritten more often than flash, so they are more suitable for storing frequently updated data, such as for a vehicle odometer or for remembering the last input selection and volume setting of an amplifier. 1976 The Cray 1 supercomputer was built using 65,000 Fairchild 1024bit RAM chips (type 10415). 1977 The first commercial bubble memory device was released by Texas Instruments in the form of a portable computer terminal that used bubble memory for storage. Bubble memory (Fig.34) is a form of non-volatile memory that uses magnetic material containing magnetised regions called bubbles or domains, each representing one bit of data. The bubbles are arranged in parallel tracks. To read a bubble (one bit of information), the bubble is moved along the track to the edge by a magnetic field, where it is read by a magnetic pickup and then rewritten to the opposite edge. It is somewhat similar to delay line memory, but magnetic domains are used rather than acoustic pulses. Garnet was found to be the best material to use. To form the tracks on a flat piece of garnet, it was necessary to print magnetic guides on the material’s surface in the shape of a “T and bar”, as shown in Fig.35. Otherwise, the domains would drift off in random directions. There were also two orthogonal spiral coils. With out-of-phase sine or triangular waves applied to the coils, they form a rotating magnetic field along the sheet of garnet. Each 360° magnetic field rotation causes each bubble to advance one step. Fig.32: an Intel 1103 SRAM chip. Source: Thomas Nguyen, https://w.wiki/5zxR (CC BY-SA 4.0). Fig.33: an Intel 1702A-6 EPROM. Note the transparent window over the silicon die. This was typically covered to prevent accidental erasure of the contents. Source: Museums Victoria, https://collections.museumsvictoria. com.au/items/1711881 (CC BY 4.0) siliconchip.com.au Fig.34: a bubble memory device with multilayered hybrid control circuitry from a Milstar Communications Satellite, late 1980s or early 1990s. The actual bubble memory element is not visible, but this shows the complexity of the control circuitry. Source: National Air and Space Museum, Washington DC USA, https://airandspace.si.edu/collection-objects/bubble-memory-microelectronichybrid-milstar-communications-satellite/nasm_A19980305001 Australia's electronics magazine February 2023  17 Table 3: desktop computer SIMMs & DIMMs Memory type Introduced Number of pins Typical max capacity Transfer rate (fastest of type) Length (approximate) * SIMM 1983 72 16MB ~250MB/s 107.9mm DIMM 1995 168 128MB 1.066GiB/s (SDR-133) 133.3mm DIMM (DDR) 1998 184 512MB 4.8GiB/s (DDR-600) 133.3mm Rambus RDRAM RIMM 1999 184 512MB 2.4GiB/s (PC1200) 133.3mm DIMM (DDR2) 2003 240 8GB 10GiB/s (DDR2-1250) 133.3mm DIMM (DDR3) 2007 240 16GB 24GiB/s (DDR3-3000) 133.3mm DIMM (DDR4) 2014 288 64GB 35.2GiB/s (DDR4-4400) 133.3mm DIMM (DDR5) 2020 288 512GB 51.2GiB/s (DDR5-6400) 135.0mm * Height is variable depending upon manufacturer, but JEDEC standards specify a maximum height Individual magnetic guides would be first magnetised in one direction, causing the bubbles to move to one end of the guide. Then the field would be reversed, moving the bubble to the other end of the guide, and so on, until the bubble reached the end of the line. Bubbles are created with an electromagnet at one end and a magnetic field detector (pickup) at the other. They are kept appropriately small by permanent magnets above and below the garnet sheet. Electronics Australia published articles on bubble memory in their January 1973 and March 1980 issues. For the details of how the bubbles are constrained and moved, see the video titled “Magnetic Bubble Memory Fundamentals 101-Constraining and Moving Magnetic Bubble Domains” at https://youtu.be/rJ-ysch4-NM Bubble memory once held great hopes, and in the 1970s, it had a storage density similar to hard drives but a higher speed, more like magnetic core memory. It was also more rugged and reliable than hard drives of the time. It was superseded by higher-density hard drives and faster semiconductor memory chips, becoming obsolete by the late 1980s. For further information, see the video titled “Digital Electronics 25 Memory - RAM Controller - Magnetic Bubble Memory” at https://youtu. be/51BslNuGnrs?t=257 You can see live motion video of magnetic bubbles at work in the video “Magnetic Bubble Memory Chip” at https://youtu.be/0rqPmjmQOxw 1978 George Perlegos of Intel developed the type 2816 2KiB EEPROM (2k × 8 bits). You can view a PDF data sheet of a later version, the 2816A, at siliconchip.au/link/abhx 1983 Wang Laboratories released the SIMM (single in-line memory module), which was used in later model IBM PC ATs and the 386, 486, Macintosh Plus, Macintosh II, Quadra, Atari STE and Wang VS computers. 1984 Fujio Masuoka invented flash memory, a form of non-volatile memory used in USB memory sticks, SD cards etc. As mentioned earlier, it is Fig.35: the layout of bubble memory. Note the ‘T and bar’ magnetic structures and the two coils at right angles. There is a permanent magnet above and below the magnetic sheet. Source: Søren Peo Pedersen, https://w.wiki/5zxS (GNU FDL) 18 Silicon Chip Australia's electronics magazine related to EEPROM, which the same person invented. 1985 Toshiba introduced the first flash memory chip (256kbits). 1986 Intel released a 256kbit flash memory using ETOX (EPROM with tunnel oxide) technology, the most common type today. 1986 1Mbit DRAM chips became available, considered a milestone at the time. It represented a transition from planar memory cells to trenched or stacked cells. Its fabrication involved 18 masks. 1993 Samsung released Synchronous DRAM (SDRAM) . 1996 Samsung Electronics introduced a 4MB FeRAM (ferroelectric RAM) chip (invented in 1952, as mentioned last month). The first commercial product to use FeRAM was the Sony PlayStation 2 8MB Memory Card, released in 2000. Its Toshiba microcontroller contained 4kiB of FeRAM. FeRAM’s advantages over flash include reduced power consumption, a larger number of lifetime read/write cycles and faster write times. Disadvantages include lower density, higher cost and lower overall capacity. Its uses include data loggers, implantable medical devices, smart meters and industrial uses to replace battery-backed memory. 1998 The first DDR (double data rate) DRAM was offered for sale. It allowed two transactions per clock cycle, effectively doubling bandwidth. 2003 DDR2 DRAM was released to the market (see Table 3). 2007 DDR3 DRAM was released. 2014   DDR4 DRAM was released. 2019   The Compute Express Link was standardised. CEL is an open standard for CPU-to-memory connections based upon PCI Express (PCIe). siliconchip.com.au 2020 DDR5 DRAM (shown in the lead photo) was released. Most of the latest-generation desktop and laptop computers use this type of RAM; the latest Intel 13th Gen CPUs can use DDR4 or DDR5, while competing AMD Ryzen 7000 CPUs support DDR5 only. SRAM vs DRAM The two main types of RAM in use today are SRAM and DRAM. DRAM (dynamic RAM) has a much higher density than SRAM but tends to be slower and needs to be periodically ‘refreshed’. SRAM uses six transistors per bit, while DRAM only requires one transistor and one capacitor per bit, hence the significant difference in density. Refreshing involves going through the whole RAM, reading each bit and then rewriting it. If this isn’t done periodically, some of the capacitors holding the bit state could discharge, and the information will be corrupted or lost. These days, the memory controller handles refresh, and it occupies well under 1% of the memory’s bandwidth, so it has little impact on performance. SRAM is faster than DRAM but occupies more chip space and is more complicated and expensive to manufacture. SRAM is used in fast cache memory, usually built into the CPU nowadays. The much larger main memory is typically a form of DRAM, which is slower but cheaper and more compact. SDRAM (synchronous DRAM) is a variation of DRAM. The memory device is controlled by an external clock signal (synchronous) via the system bus, meaning there is less wait time and the memory runs faster. In contrast, regular DRAM is asynchronous and not controlled by the system bus speed, so it is slower than SDRAM. EDO RAM (extended data out RAM) is a type of DRAM from the 1980s and 1990s designed to allow improved performance. It was replaced by SDRAM. Memory packaging Many earlier computers from about 1970 used a socketed 16-pin DIP (dual in-line package) memory chip. For example, Burroughs used Fairchild 4100 (aka 93400) 256-bit bipolar TTL RAM chips in their Illiac IV supercomputer; many later computers used the same scheme, up until the original IBM PC XT and early ATs. siliconchip.com.au From the early 1980s, DIP memory chip packages were replaced with the SIMM (single in-line memory module), invented in 1982. A SIMM is a small PCB with an edge connector and one or more memory chips mounted on that PCB (usually in TSSOP SMD packages). These initially had 30 pins on the edge connector, then 32 pins (or 36 pins for parity/ECC [error correction code] versions). From the early 1990s, 72-pin SIMMs were used in PCs with processors such as the Intel 80486, Pentium, Pentium Pro and early Pentium II. After SIMMs came DIMMs (dual in-line memory modules), which were introduced in the mid-1990s. They were developed to solve the problem of Pentium processors having to address two SIMMs in parallel due to the wider address bus of the Pentium. One DIMM effectively combined the circuitry of two SIMMs. DIMMs are still in widespread use and come in many varieties with varying speeds, capacities, number of pins, physical size etc – see Table 3. DIMMs eventually switched from using DRAM ICs in TSSOP packages (with leads on two sides) to BGA packages, with the connections underneath, increasing the board density. DIMMs for laptops are called SO-DIMMs (small outline DIMMs), and there is also the microDIMM for ultra-slim and compact portable computers. The RIMM or Rambus in-line memory module, in varieties such as RDRAM, CDRAM and DRDRAM, was available in the 1990s and early 2000s as an alternative to DIMMs but lost the “standards war” and is now obsolete. Synchronous-link DRAM (SLDRAM) was another alternative to Rambus, now also obsolete. XDR DRAM (eXtreme data rate DRAM) succeeded RDRAM, competing with DDR2 and GDDR4 SDRAM. It was released in 2003 and used in the Sony PlayStation 3. SGRAM (synchronous graphics RAM) is a form of SDRAM for graphics adaptors. Its earliest use was in the 1995 Sony PlayStation. Modern Table 4: other DIMMs Memory type Number of pins Typical max capacity Length (approximate) * DIMM (for printers) 100 512MB 88.9 microDIMM DDR 172 1GB 42.4 microDIMM DDR2 214 1GB 55.0 SODIMM 144 512MB 67.6 SODIMM DDR2 200 2GB 67.6 SODIMM DDR3 204 16GB 67.6 SODIMM DDR4 260 64GB 67.6 SODIMM DDR5 262 128GB 69.6 * Height varies with manufacturer, but JEDEC standards specify a max height Table 5: Graphics memory chips Memory type Introduced Number of pins Typical max capacity Transfer rate (fastest of type) SGRAM 1994 80-100 (TSOPII/QFP) 1MiB 400MB/s DDR SGRAM 1998 128 (BGA) 2MiB 5.6GiB/s GDDR2 2002 84 (BGA) 32MiB 16GiB/s GDDR3 2004 136 (BGA) 64MiB 19.9GB/s GDDR4 2005 78-96 (BGA) 64MiB 17.6GB/s GDDR5 2007 170 (BGA) 1GiB 40-72GB/s GDDR5X 2016 190 (BGA) 1GiB 80-112GiB/s GDDR6 2018 170 (BGA) 2GiB 112-144GiB/s GDDR6X 2020 180 (BGA) 2GiB 152-168GiB/s Australia's electronics magazine February 2023  19 Fig.36: the concept of molecular memory showing the molecule structure (top) and molecules sandwiched between X and Y address buses on conventional silicon (bottom). Original source: www.researchgate.net/figure/Cellstructure-of-a-molecular-memory-device_fig20_265727614 (CC BY 4.0) GDDR SDRAM (graphics double data rate SDRAM) provides fast, high bandwidth memory for graphics processing units or GPUs today. There are multiple generations of this: GDDR, GDDR2, GDDR3, GDDR4, GDDR5, GDDR5X, GDDR6 and GDDR6X. HBM (high-bandwidth memory) is an interface standard for 3D-stacked SDRAM chips. HBM was standardised in late 2013 and has been used in some GPUs and also large-scale CPUs like the Intel Ponte Vecchio (see page 20 of the August 2022 issue). The current version of HBM is HBM2, standardised in early 2016. All DIMM generations have had the option of supporting ‘error correction code’ (ECC). ECC memory has a chip on the memory module to detect and correct errors. It is typically used in mission-critical applications and is more expensive than regular memory for the same speed and capacity. Also, the maximum speed available for ECC memory is usually lower than for nonECC memory. Starting with the latest DDR5 standard, all modules have on-die ECC error correction, but it is not true ECC, which requires a separate chip. Buffered/registered memory Fig.37: how data is recorded and read back in a holographic memory scheme. Original source: https://slideplayer.com/slide/6143717/ 20 Silicon Chip Australia's electronics magazine Buffered memory is intended for servers and high-end workstations, while unbuffered memory is designed for PCs and low-end workstations. With buffered memory, there is a memory address register chip between the memory chips and the system memory controller, reducing the load on the memory controller. Buffered or registered memory (they mean the same thing) is more expensive and more stable than unbuffered memory, Unbuffered memory contains no memory address register, and the memory controller has direct access to the onboard memory chips. Unbuffered memory is also known as conventional or unregistered memory. The main advantage of buffered memory is that, as the CPU/chipset is no longer communicating with the DRAM chips directly, the length of the traces is no longer so critical, so there can be more DIMM sockets, and they can be located further from the CPU socket(s). While a typical desktop or laptop computer using unbuffered DIMMs usually has two or four slots, servers can have 8, 16 or more DIMM siliconchip.com.au slots for huge memory capacities (in the terabytes). Because buffered/registered RAM is usually a bit slower and more expensive, there isn’t much point in using it unless you need a high capacity. Future memory concepts The technologies discussed below are still being researched, but provide an interesting look into what types of memory could be present in the future: Molecular memory In molecular memory, chemical molecules are used as the data storage element. Data is stored as one or more reversible conformations of the molecular structure of certain molecules, as shown in Fig.36. Holographic memory Holographic memory (Fig.37) is a potential data storage medium of the future. In a holographic device, data is stored throughout the device’s volume in the form of an optical interference pattern. More than one datum can be stored in the same volume by being written and read from different angles. Special photosensitive crystals or thick photosensitive optical coatings on discs can be used as the storage medium. In holographic memory multiple bits can be read simultaneously, while in conventional memory only one bit can be read at a time. Racetrack memory Racetrack memory was an experimental concept invented by IBM in 2008. The idea is that the entities that contain the bits of information, magnetic domains, are circulated along a loop of wire (the racetrack) 200nm (200 millionths of a millimetre) across and 100nm thick under the influence Table 6: Comparison of various memory types. SRAM DRAM Flash MRAM FeRAM PRAM Read speed Fastest Medium Fast Fast Fast Slow Write speed Fastest Medium Slow Fast Medium Very slow Scalability Good Limited Limited Good Limited Good Cell density Low High Medium Medium to high Medium High Non-volatile No No Yes Yes Yes Yes Complexity Low Medium Medium Medium Medium Medium Write endurance Infinite Infinite Limited Infinite Limited Limited Table 7: Primary memory capacity of early computers Computer Year Processor EDUC-8 kit (EA, Aug 1974 – Aug 1975) 1974 Logic chips 4 (7400-series) 256b 32kiB Altair 8800 kit (Popular 1975 Electronics, Jan 1975) 8080 16 1kiB 8kiB Commodore PET 1976 6502 16 4kiB or 8kiB 96kiB Tandy TRS-80 1977 Z80 16 4kiB 48kiB Apple ][ 1977 6502 16 4kiB 64kiB Atari 400 and 800 1979 6502 16 4kiB or 8kiB Sinclair ZX80 1980 Z80 16 1kiB 16kiB IBM PC XT 1981 8088 20 16kiB 256kiB+ Commodore 64 1982 6510 16 64kiB 384kiB+ Apple Lisa 1983 68000 24 1MiB 2MiB Amiga 1000 1985 68000 24 256kiB 8.5MiB of an electric field and past read/write devices, as shown in Fig.38. This is somewhat similar to delay line memory (described last month) and magnetic bubble memory but much smaller. If developed, these devices are expected to have a higher density and be faster than flash memory. They would be produced as a ‘universal memory’ device to replace hard disks, DRAM and flash (something that Fig.38: the concept of racetrack memory. The bits of data continuously move on a wire loop past a read/write device as indicated by the meter. Original source: www.nicepng.com/maxp/u2q8e6i1o0r5r5u2/ siliconchip.com.au Australia's electronics magazine Bus width Default RAM Max RAM Intel’s 3D XPoint product Optane did achieve). Skyrmions A skyrmion can be considered a ‘swirl’ of magnetisation that moves through a magnetic material. As it moves, it temporarily changes the magnetic orientation of individual atoms. They are under consideration as memory devices that would be implemented as a form of racetrack memory. Fig.39: a commercial Everspin parallel interface toggle MRAM in a 32-pin SOIC package. It’s available with an 8- or 16-bit interface, 256kb to 32Mb capacity and memory retention of more than 20 years. February 2023  21 Relevant videos and links ● There is a video about making a modern nickel delay line memory to replace a mercury delay line in a replica of an early (1949) computer. It is titled “EDSAC delay line storage - early computer memory” and is at https:// youtu.be/9BA4AyvlKnM ● Comments about Alan Turing’s idea of using gin in a delay line memory unit: siliconchip.au/link/abhy ● A video that goes into some detail about the exact workings of bubble memory is titled “The SBC-85 1-Mbit Magnetic Bubble Memory board for the SBC 85 Single Board Computer” and is at https://youtu.be/yOe-iNIZR0E ● Video titled “What’s a skyrmion?” at https://youtu.be/3s3cmGjxPVc ● Australia’s first hobby home computer, the EDUC-8, was designed by Jim Rowe and published in Electronics Australia in 1974. It was based on two Fairchild 93415 1kbit static RAM chips plus discrete logic ICs. ● There is a modern EDUC-8 emulator; see the video titled “Electronics Australia EDUC-8 Non-microprocessor Kit Computer ROMs” at https://youtu. be/hhGDCakBNZs The emulator supports paper tape or cassette tape storage. Details of this emulator can be viewed at www.teenix.org/educ8.html and also see www.sworld.com.au/steven/educ-8 ● The world’s first mass-produced electronic calculator was the IBM 604. Its input and output were via punched cards, and the original design had up to 40 program steps. See the video titled “Running IBM 604, 1948 computer” at https://youtu.be/n58bu4CMSb8 ● Another interesting video, titled “Magnetic core memory from 40 years ago”, is at https://youtu.be/H98gfQJHZLU It can be considered a reinvigoration of the magnetic bubble memory concept. Spin-Transfer Torque RAM STT-RAM is a proposed technology that manipulates a property of charge carriers such as electrons, called spin, to store information. Magnetoresistive RAM MRAM was developed in the mid1980s and is a commercial product (Fig.39), although it presently occupies only a niche market as its advantages have not surpassed other available products. It is a non-volatile memory, but the hope is that one day it will become a universal memory. In MRAM, memory bits are stored as magnetic domains, as shown in Fig.40. There are two magnetic plates, one a permanent magnet (green) with a set orientation and the other of variable orientation (red). Between these plates, there is a thin insulating layer (blue). To set the variable layer to a particular magnetic polarity and write a bit of information, a current is passed through it via the transistor structure in the base. To read the cell, a current is passed through it. Due to a phenomenon called tunnel magnetoresistance, the resistance of the cell depends on the magnetic orientation of the variable layer. Resistive RAM Fig.40: a simplified version of the MRAM cell structure. Original source: https://w.wiki/5zxT (GNU FDL) RRAM is a proposed type of non-­ volatile memory where a change is bought about in the resistance of a normally-insulating dielectric (insulating) material. A conducting pathway is generated through the insulator using oxygen ions and vacancies from an oxide layer which are analogous to electrons and holes in a semiconductor. The elements are sometimes described as “memristors”. PMC (Programmable Metallisation Cell) memory Fig.41: the structure of an electrochemical cell memory element. Silicon dioxide’s chemical formula is SiO2, while silicon nitride is Si3N4. 22 Silicon Chip Australia's electronics magazine PMC memory, also known as CBRAM or conductive-bridging RAM, relies upon electrochemical reactions to create or dissolve a metal conducting bridge between two electrodes – see Fig.41. PMC memory is non-volatile, has the advantage of radiation hardness in space applications, and has 100 times less energy consumption for write operations than other memory technologies such as flash. SC siliconchip.com.au