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SILICON SILIC CHIP www.siliconchip.com.au Publisher/Editor Nicholas Vinen Technical Editor John Clarke – B.E.(Elec.) Technical Staff Jim Rowe – B.A., B.Sc. Bao Smith – B.Sc. Tim Blythman – B.E., B.Sc. Advertising Enquiries (02) 9939 3295 adverts<at>siliconchip.com.au Regular Contributors Allan Linton-Smith Dave Thompson David Maddison – B.App.Sc. (Hons 1), PhD, Grad.Dip.Entr.Innov. Geoff Graham Associate Professor Graham Parslow Dr Hugo Holden – B.H.B, MB.ChB., FRANZCO Ian Batty – M.Ed. Phil Prosser – B.Sc., B.E.(Elec.) Cartoonist Louis Decrevel loueee.com Founding Editor (retired) Leo Simpson – B.Bus., FAICD Silicon Chip is published 12 times a year by Silicon Chip Publications Pty Ltd. ACN 626 922 870. ABN 20 880 526 923. All material is copyright ©. No part of this publication may be reproduced without the written consent of the publisher. Subscription rates (Australia only) 6 issues (6 months): $65 12 issues (1 year): $120 24 issues (2 years): $230 Online subscription (Worldwide) 6 issues (6 months): $50 12 issues (1 year): $95 24 issues (2 years): $185 For overseas rates, see our website or email silicon<at>siliconchip.com.au Recommended & maximum price only. Editorial office: Unit 1 (up ramp), 234 Harbord Rd, Brookvale, NSW 2100. Postal address: PO Box 194, Matraville, NSW 2036. Phone: (02) 9939 3295. ISSN: 1030-2662 Printing and Distribution: 24-26 Lilian Fowler Pl, Marrickville 2204 2 Silicon Chip Editorial Viewpoint Using DRC correctly avoids errors We commonly find mistakes in PCBs and circuits while editing, laying out or proofreading articles. That is true of both designs we generate and those that are sent to us. The frustrating thing is that while we catch and fix most errors, some slip through because we can’t find them all. The more mistakes are in the original files, the more likely one or more will get through. This is especially frustrating when the errors are things that would have easily been picked up by the error-checking features of ECAD software if used correctly. This includes things like component value mismatches between the circuit and PCB, missing tracks on the PCB, tracks shorted together, having components on the PCB connected differently than in the circuit etc. I have extensively used both Altium and EAGLE software and know that both offer a similar set of ‘design rule check’ or DRC features (I think KiCad has them too). If used and used correctly, these will pick up most errors. Whether you are designing a PCB for publication in SILICON CHIP magazine, for a business venture or just for yourself, you should take advantage of these tools. The four main steps to use DRC properly are: 1 Generate or acquire a parts library with symbols and footprints for all the components you will use in your design. 2 Draw the circuit diagram in your ECAD package (‘schematic capture’). 3 Verify that the DRC rules have been set up to suit your PCB manufacturer. 4 Run DRC and check for zero errors before submitting a PCB to a manufacturer or for publication. It would also be good if any PCB designs being published were identical to the final prototype that has been verified to work, but I realise that can’t always be the case. Using the DRC steps above should allow for minor changes between the prototype and the final version without any significant errors creeping in. I think many people do not use DRC to its full capability because extra work is involved, especially in the first two steps. Despite that, I have always done so; I feel it is worth the extra effort. You don’t want to order hundreds of PCBs only to find that you have made a silly mistake and they are unusable! Another reason some people might skip it is because there are often exceptions to rules that cause ‘violations’ that are not actual problems, such as tracks/pads close together near fine-pitch SMDs. With Altium, you can create exceptions to rules, while with EAGLE, you can ignore violations after checking them. It’s worth doing those things so you are left with no errors when your design is finished. Besides eliminating the most common errors, using these DRC features also makes it easy to rejig a layout if, for example, you need to add a few components. You can rip out (delete) some of the tracks, move components around and add some new ones; then, the software will guide you to reinstate all the removed tracks. It won’t let you get it wrong (unless you ignore its warnings!). Common errors that DRC will catch include: 䕕 unrouted nets (missing tracks/connections) 䕕 short circuits between tracks that should not join 䕕 tracks that run too close to other tracks, vias or component pads 䕕 tracks that go nowhere (and might act as antennas) 䕕 tracks too close to the edge of the PCB 䕕 high-voltage tracks too close for safety requirements 䕕 tracks that are too thin 䕕 holes that are too close together So please use DRC, especially if you plan to submit a design to us for publication. Don’t skip that essential last step of actually checking it before sending your board design off! It also helps to thoroughly inspect all the Gerber layers before committing to a design. Note that our PO Box has changed (see sidebar). The old PO Box address is valid for now but will eventually be discontinued. by Nicholas Vinen Australia's electronics magazine siliconchip.com.au