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Part 2: Op Amps Precision Electronics Last month, we examined broad concepts related to precision circuit design and built a simple circuit to measure current over a wide range. We’d like to improve its precision, and to do so, we need to learn a bit more about working with op amps – this month’s topic. By Andrew Levido T he simple circuit we devised last time to measure the current in a hypothetical power supply is shown in Fig.1. We used basic parts and achieved an average result. The error budget we calculated for this circuit is reproduced in Table 1. The largest source of error was the op amp’s input offset voltage, which contributed 7% out of the total 9% worst-case error. One way to improve this circuit would be to select a ‘better’ op amp. The trick, of course, is to decide what exactly we mean by better in this case. There are many hundreds of op amps described by their manufacturers as “precision op amps” – they can’t all be just what we want! The ideal op amp At the macro level, it’s handy to consider op amps as an ideal component. The ideal op amp has infinitely high input impedance, so no current flows into or out of the input pins. It has infinite differential-mode gain and zero common-mode gain or offset error. That means that the output is exactly zero when the input pins are at the same voltage, regardless of what voltage that is. It also has zero output impedance, and the output voltage changes instantaneously when the differential input voltage changes, regardless of the output load impedance. Considering op amps to be ideal is handy when analysing op amp circuits; all the classic op amp equations we use every day make this assumption. For example, we can calculate the gain of a non-inverting amplifier such as that in Fig.1 to be (1 + R1 ÷ R2) because we assume that the op amp is ideal. Of course, real op amps are not ideal, although they come very close in many respects. We need to be aware of and understand the non-idealities when designing precision circuits. Input bias and offset currents Fig.2 shows the simplified circuits of two very common ‘jellybean’ lowcost op amps taken from their data sheets. Depending on where you get them, you can pay less than 10¢ per individual op amp for these useful devices, even in low quantities. The LM324 (the quad version of the LM358), a bipolar transistor based op amp designed for single-supply operation, is shown at the top. Below it, is the TL074H JFET-based op amp (an improved release of the TL074 and the quad version of the TL071H/TL072H). Both designs use a simple differential input transistor pair with current Table 1: error budget for the circuit in Fig.1 (repeated from last month) mirror loads, although the types of transistors used differ. Note that the LM324’s input stage is inverted compared to that of the TL074H; we’ll explain that shortly. Compound transistors (similar to Darlingtons) are used for the LM324 input pair for reasons that will also soon become apparent. Inspecting the LM324 circuit, it should become obvious that some small current must flow out of the input terminals to bias the transistors on. This “input bias current” (Ib) can cause an unwanted voltage at the op amp’s inputs by generating a voltage across the source impedance. The effect of bias current naturally becomes more important when the source impedance is high. For the LM324, Ib is specified to be less than -35nA at 25°C, up to -60nA over the operating temperature range (–40°C to +85°C). The usual convention is that positive currents flow into a pin, so these negative values imply that the bias current flows out of the pin. The bias current is why you may see a resistor connected from the non-­ inverting input to ground in inverting amplifier circuits. The value is chosen to have the same resistance as the source network connected to At Nominal 25°C Error Nominal Value Shunt Resistor: Stackpole CSR1225 (1% 100ppm/°C) 100mW Node A Voltage due to I × R shunt 100mV 1mV Op Amp: LM7301 (Vos ±6mV, 2μV/°C) 0mV 6mV Node A Voltage total (Line 2 + Line 3) 100mV 7mV Op Amp Gain Resistor R1: Yageo RC0805 (1% 100ppm/°C) 1kW 1.00% 0.25% Op Amp Gain Resistor R2: Yageo RC0805 (1% 100ppm/°C) 24kW 1.00% 0.25% Op Amp Gain (R1 + R2) ÷ R1 25 0.5 2.00% 0.125 0.50% Vout (Line 4 × Line 7) 2.5V 0.225V 9.00% 0.02V 0.80% 38 Silicon Chip Abs. Error Rel. Error 0-50°C (Nominal ±25°C) Abs. Error 1.00% Australia's electronics magazine 1.00% Rel. Error 0.25% 0.25mV 0.25% 0.05mV 7.00% 0.3mV 0.30% siliconchip.com.au the inverting input so that any voltage due to the bias current is equal on both inputs and therefore cancels out. Without that, a differential temperature drift can occur, making trimming the op amp almost impossible! However, the bias currents at each input will never be precisely equal due to manufacturing tolerances. Ib is actually defined as being the average of the two bias currents. The difference between them is the “input offset current” (Ios). For the LM324, this is specified to be no more than ±5nA over the full temperature range. You may have now figured out one of the main reasons for the LM324’s use of compound transistors – they have a much lower base current for the same collector current, so using compound transistors here helps to minimise that pesky input bias current. Even so, the input bias current of the FET op amp is much lower than that of a bipolar op amp due to the diodes at JFET gates being reverse-­biased during normal operation. For the TL074H, the maximum bias current is ±120pA at 25°C and ±5nA (±5000pA) over the full temperature range. Notice that while the input bias current for the FET op amp is lower at room temperature, it is much more sensitive to temperature. The input offset current is also proportionally higher as it’s harder to match JFETs than it is to match BJTs. CMOS op amps are available that use Mosfets for the inputs, which have an even higher gate impedance, and thus lower bias currents (in the femtoamps!), like the LMC6482. LM324 to be [V–, V+ – 2.0V] (over its operating temperature range). That means the input range extends from zero (V–) to 2V less than the positive supply voltage. Op amps designed for single-supply operation often have this ‘inverted’ PNP or P-channel input stage with Vcm extending to 0V. The TL074H input stage also has a Vcm limitation, but because it uses N-channel JFETs in a conventional differential pair, the limitation is on the negative rail side. The Vcm of the TL074H is [V– + 1.5V, V+]. Exceeding the common mode range can cause very odd behaviour in some devices, so you generally must ensure your input signals stay within the op amp’s rated Vcm range. Fig.1: our first attempt at sensing current from the last article. This circuit used simple parts and achieved very average results with untrimmed errors in the order of 2% at 25°C. We can do much better by selecting better parts. Input common-mode range The other thing that should be apparent is that the range of input voltages over which the differential pair can operate is limited. Looking at the LM324, the input transistors’ base-emitter junctions will be forwardbiased with the inputs at the negative rail (the ESD protection diodes will prevent them from going much lower). However, there must be some voltage drop across the Vbe junctions of the input transistors and the 6µA current source, so there will be an upper limit on the input voltage somewhat lower than the positive supply. Above this limit, the transistors will be biased off. This active input voltage range is known as the common-mode voltage range (Vcm) and is specified for the siliconchip.com.au Fig.2: these simplified internal circuits of the LM324 (top) and TL074 (bottom) op amps show the input differential pairs and push-pull output stages. The LM324’s input stage is inverted compared to the conventional differential pair of the TL074 because the LM324 is designed for single-supply operation. Australia's electronics magazine December 2024  39 This can become a problem when operating from low-voltage supplies, which are common these days. For example, the LM324 will work with a supply as low as 3V, but in this case, the Vcm range will be just [0V, 1V]. You should also be careful if you intend to use an op amp designed for dual-­ supply operation in a single-­supply circuit, as the Vcm may not extend to either voltage rail. Rail-to-rail input op amps Plenty of op amps claim to have ‘railto-rail’ inputs, such as the LM7301 we used in the first instalment of this series. These op amps usually have two differential pairs at the input – both NPN and PNP in the case of bipolar op amps, or an N-channel FET and a P-channel FET in the case of FET-­ input op amps. These work well in many applications, and their Vcm range includes both supply rails, but they have a few peculiarities you should be aware of. Because they effectively switch between two input stages, their input bias current and input offset voltage can show unusual behaviour. Fig.3 shows that, for the LM7301, the input bias current reverses polarity a volt or so below the positive supply rail. The graph also shows that the input offset voltage kicks up at the same point as the op amp switches from one input circuit to another. We saw in the last article that one of the keys to precision circuit design is to trim out constant errors (usually in software). The type of non-­linearities that rail-to-rail input op amps can introduce can make this trimming very difficult. By all means, use them when needed, but exercise caution. Input offset voltage (Vos) This brings us to input offset voltage, which is causing most of the problems with our test circuit. Identical input transistors with identical collector or drain currents at the same temperature should have identical base-emitter or gate-source characteristics. Unfortunately, manufacturing variances mean neither the transistors nor the mirrored currents will be perfectly identical, so there will be a difference in Vbe or Vgs(th) between the two input transistors. The impact of these differences means that even with the input pins connected together, the output of an op amp will saturate at one supply rail or the other (and you can’t predict which). If the loop is closed, the output voltage will be the difference in Vbe or Vgs(th) multiplied by the closed-loop gain. This difference can be modelled as a small voltage source in series with one of the inputs of otherwise perfectly matched input transistors. This is the definition of input offset voltage (Vos). In the case of the LM324, Vos is specified to be ±2mV (worst case) with ±7µV/°C of temperature drift, whereas for the TL074H, it is ±4mV (worst case) with ±2µV/°C drift. JFET op amps usually have a higher Vos since a JFET’s (or Mosfet’s) Vgs(th) parameter is less tightly controlled than the bipolar transistor’s Vbe. Reducing input offset voltage Op amp offset voltage is caused Fig.3: this extract from the LM7301 data sheet shows how the input bias current abruptly switches polarity, and the input offset voltage kicks up when the input common-mode voltage gets to within a volt or so of the positive rail. This results from the rail-to-rail input stage switching between the normal and inverted differential pairs. Both plots are for ±2.5V supply rails. 40 Silicon Chip Australia's electronics magazine by unavoidable manufacturing variation between the input transistors, so you might think we are stuck with it. However, op amp designers are a pretty creative group, and they have come up with some very clever circuits to minimise voltage offset and, more importantly, minimise offset voltage drift with temperature. The first technique is laser trimming, where the offset voltage of an op amp is measured after manufacturing and then a laser is used to adjust the value(s) of onboard resistor(s) to compensate for it – a little like having a tiny trimpot onboard the IC that’s set before it’s packaged. Doing this costs money, so high-­ precision op amps tend to cost more but can have very low offset voltages (and low drift), down to the sub-­ microvolt level in some cases. However, as it’s a static adjustment, it does nothing to improve temperature drift. An example of a laser-trimmed op amp is the OPA277PU, with a maximum Vos of ±20μV and a maximum Vos drift of ±0.15μV/°C. The second technique is auto-­ zeroing or auto-nulling, as shown in Fig.4. Along with the main op amp, OAa, the package includes nulling op amp OAb. During one phase of the clock (phase A), the inputs of OAb are connected together, so its output is its offset voltage, which is stored in capacitor C1. During the other phase (phase B), OAb measures OAa’s offset and stores it on capacitor C2. The voltage on capacitors C1 and C2 are used to null out the Vos of the nulling and the main amplifiers, respectively. The nice thing about this approach is that the primary signal through the main op amp, OAa, is never switched. OAb alternately nulls itself and OAa, more or less eliminating the offset regardless of how it changes over time. Another technique is the chopper approach, shown in Fig.5. Again, the amplifier is broken into sections OAa and OAb. On clock phase A, the two stages are connected such that neither stage inverts the input signal, while on phase B, they are connected such that both stages invert the signal. The result is that the output signal always has the right sense, but the offset voltage across the capacitor alternates in polarity and thus averages to zero. These circuits (and their variations) siliconchip.com.au Fig.4: auto-zero op amps have a second nulling amplifier that alternatively nulls its own Vos and that of the main amplifier. The result is extremely low Vos and, more importantly, very low Vos drift with temperature. Fig.5: a chopper op amp reduces the overall Vos by alternating the polarity of the signal through two stages. The output always has the same sense, but the offset voltage at the capacitor alternates in polarity and averages to zero. can achieve remarkable results in terms of low offset. The AD8551, for example, uses a nulling approach and has a maximum Vos of ±5µV with a ±40nV/°C tempco. The LTC2057 uses a chopper configuration and achieves even better results, with a maximum Vos of ±4µV with ±15nV/°C tempco. These figures are around 1000 times better than the jellybean op amps. The downside is that some switching artefacts will appear in the output, so they don’t have the best noise performance. They also tend to be limited in bandwidth and require a higher supply current, either of which could be a concern if you are building a high-bandwidth or an ultra-low power design. They are also more expensive, at around $5 for the LTC2057 and $6.50 for the AD8551. Input impedance We also need to consider the input impedance. Input impedance is the small-signal open loop impedance seen at the input. It is specified as a common-mode impedance (inputs tied together to ground) and a differential-­ mode impedance (between inputs). The common-mode impedance is usually the higher of the two. Differential mode impedance is not usually a concern at low frequencies, as negative feedback forces the voltage siliconchip.com.au between the inputs to zero, effectively bootstrapping the differential impedance to a very high value. Imperfect output stages You can see from Fig.2 that the output voltage of our op amps will not be able to swing all the way to either power rail due to the finite saturation voltage of the output transistors and the drop across the output current limiting circuits. In the case of the LM324, you can also see that the output swing may not be symmetrical. The output swing is generally described in terms of the voltage ‘headroom’ or how close the output voltage can approach the supply rails with some given load. With a 10kW load, the LM324 can reach within 0.15V of the negative rail but can only get to within 1.5V of the positive rail. On the other hand, the TL074H can get to within 0.25V of either rail with the same load. Some op amps offer output swings much closer to the rails than these basic parts, typically to within 50mV of the rails into 10kW. Still, no op amp will swing completely to the rail – a fact that caught us out in the first iteration of our test circuit in the previous article in this series (sometimes you can help them get closer with a resistor tied to one rail or the other, but it only works for one rail!). Australia's electronics magazine Op amp data sheets may show a figure for open-loop output impedance (125W in the case of the TL074H), but you can’t use this directly to determine the maximum output current or swing in closed-loop applications. That is because the effective output impedance is reduced by the loop gain. What may be important in your application is the maximum current that the op amp can source or sink, usually specified as a short-circuit current. This is typically in the ~20mA range (it’s ±26mA for the TL074H and ±40mA for the LM324). There are high-current op amps, some sourcing and sinking several amps, but they are rare and can be pricey. Gain, bandwidth & slew rate An op amp’s open loop voltage gain is not infinite, but it is pretty high, typically in the order of 100dB to 120dB at DC but dropping linearly to unity at a frequency ft, sometimes called the gain-bandwidth product (GBW). For stability, most op amps have internal dominant pole frequency compensation that reduces the op amp gain to 0dB at a frequency where the phase shift is well below 180°. Fig.6 shows a curve for a typical op amp. The open loop gain at DC is a little over 110dB, dropping from about 2Hz more-or-less linearly to ft, which is a little over 1MHz. In this December 2024  41 Table 2: error budget for the improved circuit in Fig.7 At Nominal 25°C Error Nominal Value Shunt Resistor: RESI PCSR2512DR100M6 (0.5% 15ppm/°C) 100mW Node A Voltage due to I × R shunt 100mV 0.5mV Op Amp: LTC2057 (Vos ±4μV, 15nV/°C) 0μV 4μV Node A Voltage total (Line 2 + Line 3) 100mV 0.504mV Op Amp Gain Resistor R1/R2: Vishay ACASA 1000S1002P1AT (0.1%, 0.05% matched, 15ppm/°C) 26W Op Amp Gain (R1 + R2) ÷ R1 26 0.013 0.05% 0.0098 0.038% Vout (Line 4 × Line 6) 2.6V 0.0144V 0.55% 0.002V 0.075% case, the phase shift at ft is -85°. The op amp would oscillate if the phase shift reached -180° and the gain was still greater than unity. The difference between the phase shift at ft and -180° is known as the phase margin; it is 95° in this case. This is the maximum phase shift your feedback circuit can safely introduce if you want the op amp to remain stable. It’s important to remember that the blue curve is the open loop gain. The orange line illustrates a typical closedloop gain, in this case, a gain of 10 (or 20dB). The closed loop gain is flat to about 100kHz, which is what you would expect with a gain-bandwidth product of 1MHz. One side effect of this dominant pole compensation is that it limits how quickly the op amp output can change in response to a change in the differential input voltage. This is known as the slew rate and it is typically measured in volts per microsecond (V/ μs). The LM324 has a GBW of 1.2MHz Abs. Error Silicon Chip Abs. Error 0.50% 0.50% and a slew rate of 0.5µV/s, while the TL074H has a GBW of 5.25MHz and a slew rate of 20V/µs. Op amps with a higher GBW usually (but not always) draw more supply current, and conversely, low-power op amps have a lower GBW. If you want an op amp with a low power draw and a high GBW, be prepared to pay extra. Choosing an op amp There is a lot to consider when choosing an op amp, and there are a vast number of options, so where do we start? I suggest you begin by narrowing down the parameters you really care about. Taking our current-­ measuring circuit as an example, we don’t care too much about the AC parameters, such as bandwidth and slew rate, since we are interested in DC measurements. With ±5V supplies and a signal ranging from 0V to around 2.5V, we also don’t have any stringent Vcm or output swing requirements, so we can set Australia's electronics magazine Rel. Error 0.038% 0.0375mV 0.038% 0.375μV 0.50% 0.0379mV 0.05% Fig.6: most op amps have an open-loop gain dominated by a low-frequency pole that ensures the gain (blue curve) falls to 0dB well before the phase shift reaches -180°. This ensures the op amp remains stable at any closed-loop gain. The frequency at which this occurs is known as the ft (the transition frequency) or gain bandwidth product (GBW). 42 Rel. Error 0-50°C (Nominal ±25°C) 0.038% 0.038% them aside. As long as the input and output voltages are within a couple of volts of the rails, we will be OK. Since our source impedance is very low due to the low-resistance current shunt, the contribution to error from input bias and offset currents will be negligible. So, our primary focus should be on Vos and, more importantly, its drift with temperature. Cost and availability are also factors that should not be ignored. It so happens that I had a few LTC2057s on hand, and we have already seen their Vos figures are impressive, a maximum of ±4µV with ±15nV/°C tempco. Other improvements While we are at it, we should look also at the rest of the components. The shunt resistor has a tolerance of ±1% and a tempco of 100ppm/°C. Lowvalue resistors with very tight tolerances (say in the 0.1% range or better) are extremely expensive, so they are not worthwhile since this kind of Fig.7: the improved version of the circuit from Fig.1. The LTC2057 has much better offset performance and the gain resistor ratios have much better temperature tracking. The resulting circuit will have better untrimmed accuracy but, more critically, less drift with temperature changes. siliconchip.com.au error can be trimmed out. However, it is possible to get a resistor with a much lower temperature coefficient at little extra cost. For example, the 100mW resistor in Table 2 has a tempco of ±15ppm (and a slightly better tolerance of 0.5%) for about $3.30 each in quantities of 10. We can also do better with the tempco of the gain-setting resistors. Again, we could splash out on expensive 0.01% resistors, but that would be wasting money. What matters most to us is the temperature coefficient. Further, what we really care about is the tempco of the ratio of the gain setting resistors, since if they drifted high or low together at precisely the same rate, the gain would not change. I like to use low-cost matched resistor arrays for this type of application. These have a small number of lasertrimmed resistors on a common substrate. They are well-matched in value and likely to be at the same temperature, thus tracking each other well. The Vishay ACASA range of resistors fits the bill perfectly. They are low in cost, have a 0.1% overall tolerance, and are matched to within 0.05%. The most readily available subset has an absolute temperature coefficient of ±25ppm and a relative temperature coefficient of ±15ppm. An array of four such resistors costs ~$1 each in lots of 10. We can’t quite get the 24:1 ratio of R1:R2 in the original circuit since the ACASA range comes in only a few values, but I can get an array consisting of two 100W and two 10kW resistors that can be arranged to create a 25:1 ratio. The result is a gain of 26 instead of 25, but that should not be a problem since we can scale and offset our readings in software. Fig.7 shows the revised circuit diagram. I have put these components into the error budget table (Table 2), which shows we can expect an untrimmed precision of ±0.55% at 25°C with a further 0.075% drift over the 0°C to 50°C temperature range. The overall untrimmed precision is about 20 times better than before, and the temperature performance is about 10 times better than the previous design. The error is dominated by the initial shunt tolerance, which will have to be trimmed out. Experimental results The test results are shown in Table siliconchip.com.au Measured Data Error Measured Data Current Vout Abs. Rel. 0.076 Current Vout Error Abs. Rel. -1.100 -1.3 -0.05% 0.0 0.2 0.0 0.00% 99.810 258.380 -1.1 -0.05% 97.9 259.2 -0.4 -0.01% 199.795 519.380 -0.1 0.00% 198.2 519.6 0.1 0.01% 299.311 779.470 1.3 0.05% 298.3 779.2 1.0 0.04% 400.073 1040.64 0.5 0.02% 398.3 1039.8 -0.4 -0.02% 500.314 1302.00 1.2 0.05% 498.3 1300.6 -0.2 -0.01% 600.575 1563.33 1.8 0.07% 598.3 1561.4 -0.1 0.00% 700.995 1825.17 2.6 0.10% 698.0 1822.7 0.1 0.00% 801.785 2087.33 2.7 0.11% 798.0 2084.3 -0.3 -0.01% 902.612 2350.11 3.3 0.13% 898.0 2346.5 -0.2 -0.01% 1003.431 2613.58 4.7 0.19% 998.0 2609.5 0.6 0.02% Table 3 – measurements from the Fig.7 prototype. Units: Current (mA), Vout (mV), Absolute (mV), Relative (%). Table 4 – readings after applying fixed offset and gain corrections. 3. To measure circuits of this precision, you need good instruments and a carefully designed measurement setup. The worst-case error is just under 0.2% at full scale, and it increases steadily, suggesting a gain error of some kind. These values are plotted in Fig.8, along with a line of best fit. This suggests we have an offset error of about -1.3mV (about 50µV on the input side of the op amp) and a gain error of about 0.2%, most likely due to the shunt resistor tolerance. Table 4 shows the results if we apply a fixed offset and gain correction to the measured values. That gives a trimmed precision better than ±0.04%. From the error budget, you will see that the tempco is of the same order (±0.075%), so we can achieve an overall precision of a little over 0.1%. That is a tenfold improvement over our initial circuit. Next time, we will look at how we could measure this current if the shunt were in the positive supply instead of being ground-referenced. That is often desirable so the load can share a common ground with the supply (which would be necessary if both were Earthed). References • AD8551 data sheet: siliconchip. au/link/ac01 • “Demystifying Auto-Zero Amplifiers Part 1”: siliconchip.au/link/ac02 • LM324B data sheet: siliconchip. au/link/ac03 • LM7301 data sheet: siliconchip. au/link/ac04 • LTC2057 data sheet: siliconchip. au/link/ac05 • TL074H data sheet: siliconchip. SC au/link/ac06 Fig.8: a plot of the data points from Table 3 with a line of best fit. This suggests an offset of -1.3mV and a gain error of about 0.2%. We can use these figures to trim the measured values and eliminate fixed errors. Australia's electronics magazine December 2024  43