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Part 1 by Richard Palmer
WiFi DDS
Function Generator
A signal generator is one of the most useful instruments on the test bench.
This flexible and easy-to-build generator provides two wide-range, low-distortion
outputs. It can be controlled from its LCD touch screen or remotely by a
computer, tablet or smartphone using a WiFi connection.
W
hile sinewave signals are commonly used for testing audio
circuits, triangle, square,
pulse and ramp signals have many
test applications in the power, digital and linear arenas. Some commercial function generators include many
rarely-used waveforms, such as Lorenz
pulses and even heartbeats, but we
have chosen to avoid excessive complexity in this project.
Subwoofers and their crossovers
pose challenges for many audio tools
that can only generate signals from
20Hz to 20kHz. This unit’s outputs
are DC-coupled, so it can produce very
low (sub 1Hz) frequencies with very
low distortion.
Out-of-band frequency testing can
be important in other aspects of audio
design, as signals beyond the audio
range may impact signals at audible
frequencies through intermodulation
and other effects. We have extended
sinewave generation up to 70kHz to
support such testing and included
an intermodulation distortion (IMD)
test signal.
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Silicon Chip
Tone burst and pulse testing can
help identify ringing and other circuit misbehaviour. Both frequency and
amplitude sweeps are supported for
sine, square, and triangle waves. Additionally, duty cycle sweeps are provided for square and triangle waves,
plus amplitude sweeps for pulse and
step waveforms. Bursts are available
for all waveforms.
For sine, triangle and square waves,
channel B can mirror channel A with
a phase shift of 0-360°. For most other
waveforms, channel B can mirror
channel A, either in phase or 180°
out of phase.
The output terminals are floating
with respect to mains Earth to avoid
hum-inducing Earth loops.
Like my previous lab projects, it
can be remotely controlled via a web
browser, see:
• Programmable Hybrid Lab Supply (May & June 2021; siliconchip.
au/Series/364)
• WiFi Programmable DC Load
(September-October 2022; siliconchip.
au/Series/388)
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• Automated Test Bench/Swiss
Army Knife (April 2023; siliconchip.
au/Article/15736)
Also like those other projects, it has
a set of SCPI commands that allows it
to be part of an automated test setup
controlled by a program such as TestController (siliconchip.au/link/abev).
I described how to use that software in
an article in April 2023 (siliconchip.
au/Article/15740).
Automatic testing of a vast range
of equipment is possible using combinations of the four instruments in
this series!
Performance
Noise and distortion are important
performance measures for sinewave
signals. As shown in Figs.1 & 2, for a
2V peak-to-peak signal from 20Hz to
2kHz, distortion was below 0.0025%,
rising to only 0.0055% at 10kHz.
Accurate measurement beyond
25kHz was not possible due to the
predominant 3rd harmonic moving
beyond the Nyquist limit of my audio
analyser, which samples at 192kHz.
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Features & Specifications
» Seven waveform options: sine,
square, pulse, triangle, stepped, IM
(intermodulation) & white noise
» Two independent or linked channels
with adjustable phase difference
» Maximum output level: 11.5V peakto-peak
» Sine frequency range: 0.01Hz to
70kHz
» Sine frequency response: ±0.1dB,
1Hz to 50kHz (see Fig.3)
» Sine distortion: <0.003% to 5kHz,
<0.007% to 20kHz (see Fig.2)
» Signal-to-noise ratio: >80dB
» Square, triangle and pulse
frequency range: 0.01Hz to 20kHz
» Intermodulation (IM), white noise
and step functions
» Comprehensive sweeps and tone
bursts
» Control via 3.5in LCD touchscreen
and WiFi (web browser or SCPI)
» TestController definitions for
automation
» Optional laser-cut bench stand
The number of sample points at 10kHz
is only nineteen, reducing as the frequency rises. At 50kHz, there are only
four sample points per cycle, with the
DAC’s interpolation filter raising the
number to eight.
It is no wonder that it is impossible
to maintain extremely low distortion
with very few samples per cycle.
Measured distortion below 20Hz
rises to 0.0055% at 7Hz. The actual
distortion could be lower, as my test
equipment is AC-coupled and the
input filter’s drop-off degrades measurements below 20Hz.
The background noise is -89dB
(unweighted) below a 2V peak-to-peak
output level in the 5Hz-20kHz band,
mainly comprising 50Hz mains hum
and its harmonics.
That figure should be better at higher
output levels as the signal will be
greater but the noise/hum level will
remain similar.
The sinewave frequency response
varies by less than ±0.1dB across the
entire range (see Fig.3).
Further exercising the DAC and
filter with an SMTE/DIN standard
intermodulation signal, a 4:1 mix
of 60Hz and 7kHz, the artefacts are
100dB below the 60Hz peak and 88dB
below the 7kHz component, as shown
in Fig.4.
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Fig.1: distortion at 1kHz measures 0.0026%, with noise nearly 90dB below
the fundamental.
Fig.2: distortion remains below 0.003% between 10Hz and 2.5kHz, rising to
0.006% at 25kHz, the limit of our testing capability.
Fig.3: the DDS frequency response is flat within 0.1dB across the whole
range.
Australia's electronics magazine
May 2024 41
Fig.4: in the intermodulation distortion (IMD) test, the sidebands, separated
from the fundamental by 60Hz, are more than 100dB below the -3.18dBV 60Hz
signal, which is off-screen for clarity.
The sinewave frequency is very
accurate and stable, being locked to the
Pico’s crystal oscillator. As the phase
accumulator has a finite number of
bits, there will always be a small positive frequency error due to truncation
from floating point to integer values
when the per-sample phase increment
is calculated. However, this frequency
error is less than 0.012% across the
audio band.
Pulse waveforms have a resolution
of 5µs due to the 192kHz DAC sampling rate. The maximum square wave
frequency has been limited to 20kHz.
While it is possible to create pulses
with a shorter duration, the filtered
output becomes increasingly rounded
beyond that point (Scope 1). This is
due to the DAC’s internal digital filter
and the analog filter’s 100kHz corner
frequency.
The maximum slew time of rising
and falling edges is 5µs (Scope 2),
largely independent of voltage. This
is mainly due to the DAC’s digital filtering and interpolation.
For square, triangle and pulse
waveforms, the available frequencies
become more granular as the frequency
Scope 1: by 16kHz, the square wave output starts to become
rounded.
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Silicon Chip
increases, as each phase of the waveform – rise, high, fall and low – is limited to an integral number of samples.
At 1kHz, the total number of samples
in a cycle will be 192; the next available step, at 191 cycles, will give a frequency of 1.0052kHz.
A 10kHz square wave will have 20
samples, slightly higher than the perfect value of 19.2, resulting in a frequency of 9.6kHz. The next available
step, with 18 samples, is 10.66kHz.
The step from 19.2kHz to 21.33kHz
is twice as large.
Sinewave generation is not greatly
affected by the small number of samples at high frequencies due to the
DAC’s oversampling at 384kHz, which
fills in the missing samples quite effectively up to 60kHz, as seen in Scope 3.
Closer to the Nyquist limit of 96kHz,
artefacts from the DAC’s digital filter start destabilising the waveform
(Scope 4).
Signal generation
Traditional analog sinewave generators, such as the Wien bridge, can
produce excellent noise and distortion
figures but lack flexibility. Generating
more complex waveforms, such as
tone bursts, frequency sweeps, triangular waves and dual-tone intermodulation (IMD) signals rapidly increases
analog circuit complexity.
Direct digital synthesis (DDS) provides the required flexibility and can
be implemented with simple circuitry
at the expense of somewhat more complex software.
Generating a high-quality sinewave
Scope 2: interposing a single sample midway between the
high and low levels largely cures signal overshoot.
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Most of the components and connectors, including the two main modules, mount on the side of the PCB shown at right.
Sockets are recommended for the microcontroller and DAC modules, while IC sockets are optional. Either of the two
commonly available PCM5102A modules can be accommodated on the PCB. The photo on the left shows the LCD screen,
function LEDs and user controls, which are mounted on the rear of the main PCB.
poses a significant CPU speed challenge. Calculating a separate sin(x)
value for each sample is relatively
time-consuming, requiring several
double-precision floating-point calculations. At a 192kHz sampling rate,
two new samples (for both channels)
are needed every 5µs.
Calculating a pair of values using
sin(x) on the Pico, which lacks floating point hardware, takes 16µs, making direct calculation impractical. The
calculations must take less than 1µs,
leaving sufficient time for other processing and housekeeping tasks such
as triggering, burst and sweep management.
To achieve this, a 4096-entry sine
lookup table (LUT) is pre-calculated.
It contains one whole cycle of a sinewave in integer format. The code steps
through the table, selecting the correct
value for each sample.
So that any frequency can be
selected, not just those that correspond to exact entries in the table, the
required location in the table is calculated using a 20-bit phase accumulator
with a 12-bit upper part to index into
the lookup table and an 8-bit lower
part used to interpolate between the
two nearest table entries.
While there are many ways to calculate a value partway between two
points on a curved line, the quickest
is a linear approximation, which treats
each segment as a straight line.
While it might seem that this would
lead to significant inaccuracies, the
substantial size of the lookup table
ensures that the error, which is greatest
at the point of maximum curvature on
Scope 3: the raw 20kHz sinewave output of the DAC
(orange trace) has steps at 384kHz due to the DAC
oversampling rate. The output of the filter circuit (green
trace) smooths the steps out.
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the sinewave, remains below 0.0005%.
That is four times lower than the
0.002% distortion figure specified for
the DAC.
As the Pico does not have integer
division arithmetic hardware, we have
avoided using division during the calculation of individual samples by the
simple expedient of precalculating the
inverse of any required divisors using
fixed point (with 10 bits for the fractional part) and multiplying instead.
That is around 23 times faster than
using actual division.
The intermodulation mode sums
the A and B channel sinewave calculations, sending them to the channel A output. Channel B may still be
used for other waveforms while this
is happening.
White noise is implemented as a
Scope 4: by 70kHz, the DAC output has become quite
ragged, and the filtered output shows visible distortion near
the peaks. The scalloping of the raw signal is due to the
DAC’s internal digital filter.
Australia's electronics magazine
May 2024 43
sequence of pseudorandom values
calculated to be within the desired
voltage range.
The square, triangle, pulse and step
waveforms all use the same pulse-
generating algorithm internally. Pulse
signals are straightforward to generate, being a sequence of linear ramps
between set points.
For steep slopes, the value increments by an appropriate value for each
sample, while for shallower slopes,
the value is incremented after several cycles.
When the slope approaches one
increment per sample, the range of
slopes becomes very limited. In this
case, increments are calculated for
blocks of 50 samples, increasing both
slope granularity and accuracy.
Channel A provides sweep and burst
capability across a range of waveforms.
For burst waveforms, the output
alternates between the idle value and
active signal, each with the desired
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number of cycles. For sinewaves, the
idle value is the DC offset, while it is
the low voltage set point for square, triangle, pulse and step waveforms. For
IMD and white noise, it is 0V.
For IM and white noise, the on and
off periods are calculated in milliseconds, and the changes are made immediately after a zero-crossing to minimise transients. For all waveforms, the
output is switched on or off immediately after a zero crossing to minimise
transients.
Sweeps are generated as a series
of stepped values between two end
points. Amplitude, frequency or duty
cycle can be swept as appropriate to
the waveform. Sweeps may be linear
or logarithmic. At each sweep step,
the new waveform value starts from
the last output value (see Scope 5) to
minimise transients.
Negative values are problematic for
logarithmic sweeps, as the logarithm
of negative numbers is undefined.
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Where this is detected, a value of
0.01 is substituted for the offending
setting.
Circuit operation
As shown in the full circuit diagram, Fig.5, we use an audio DAC
(digital-to-analog converter, MOD1)
driven by a microprocessor to generate the signals. Following the DAC
is a filtering buffer amplifier (IC1),
which reduces out-of-band frequencies and increases the available output voltage.
The Raspberry Pi Pico W microcontroller at the heart of this project features two CPU cores and comprehensive WiFi and Bluetooth capabilities.
In this application, one core is dedicated to signal generation while the
other manages WiFi, the LCD screen,
EEPROM, switches, the rotary encoder
and housekeeping tasks.
While the ESP32 used in previous
instruments in this series has sub-
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stantially faster arithmetic hardware
that would be useful for DDS signal
generation, the simplicity of uploading programs and the low cost of the
Pico W made it a better choice for
this project.
A PCM5102A 24-bit stereo DAC
chip translates the values calculated
by the Pico into voltages, with a maximum output of 2.1V RMS (5.9V peakto-peak). Thanks to a charge pump
that’s internal to the PCM5102 chip,
it can produce negative and positive
voltages from a single supply, allowing the design to be direct-coupled,
which is critical for low-frequency
signal generation.
Modules containing the PCM5102A
are readily available online, premounted with support components
on a small PCB, avoiding the need
to solder an SMD component with
finely spaced pins. The circuit of
our recommended module is shown
in Fig.6.
The top of the Function Generator has four RCA sockets for the two output
channels plus the trigger input and output, as well as the coaxial power
connector. It is shown here on the optional stand.
A key design consideration was the
DDS sampling rate. At 96kHz, two
sinewaves can be comfortably synthesised on the Pico. However, the practical sinewave frequencies would be
limited to around 35kHz and square
waves to 10kHz before significant distortion.
Simultaneously synthesising two
sinewaves with a 192kHz sampling
rate is difficult with the Pico running
at its standard 133MHz clock speed.
However, stable synthesis is achieved
with mild over-clocking to 240MHz.
That might seem extreme, but the
maximum supported clock rate is
Fig.5: the Pico W microcontroller module streams serial digital audio data to the PCM5102 DAC module. Its analog
outputs are filtered and amplified by dual op amp IC1 and fed to the outputs at CON4 & CON5. The Pico W also manages
the LCD touchscreen, control switches and LEDs. It provides web services via WiFi for remote control as well.
siliconchip.com.au
Australia's electronics magazine
May 2024 45
The WiFi DDS Function
Generator resting in the
optional acrylic stand.
300MHz, and RP2040 processors have
been clocked to 436MHz and beyond
without damage.
I ran some tests and after several
hours of operation at 240MHz, the
RP2040 chip was only a few degrees
hotter than it was running at 133MHz.
The DAC’s output signals are amplified and filtered to reduce out-ofband components using a dual lownoise NE5532 op amp IC, increasing
the available output to 4.1V RMS
(11.5V peak-to-peak), which should
be sufficient for most applications.
The DC-coupled filter allows voltage offsets to be applied to the signals, which is particularly useful for
square, pulse, stepped and triangle
waveforms.
For the LCD screen, 3.5in touchscreens are only slightly more expensive than the 2.8in variety and provide 50% more screen area with 100%
more pixels.
While creating all sorts of waveform options in software is relatively
straightforward, every option requires
an on-screen parameter. To keep the
Fig.6: the circuit of the PCM5102-based DAC module. Using it means we don’t have to solder the SMD IC. It provides
two regulators and some other necessary components, including numerous bypass and filter capacitors.
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Australia's electronics magazine
siliconchip.com.au
size and separation of the on-screen
buttons and text reasonable, we have
limited the main elements of the
touchscreen layout to seven lines of
editable parameters and a row of buttons across the top and bottom of the
screen.
A 24C256 I2C EEPROM chip stores
parameters when the circuit is powered off. While the Pico has onboard
flash memory that could be used to
store the values, it has a write endurance measured in tens of thousands
of cycles, rather than the millions of a
true EEPROM. With parameters saved
every 30 seconds, the flash memory
could wear out after less than 100
hours of use.
The four pushbutton switches are
debounced in software and use the
Pico’s internal pull-up resistors to
sense contact closure. The rotary
encoder creates significant switching
noise, so it requires additional components to function correctly; two RC
low-pass filters remove most of the
noise while passing up to 100 pulses
per second.
Power supply
Powering the unit posed several
challenges. The Pico generates significant noise in the 2-12kHz band from
its onboard switch-mode voltage regulator. This is reflected back into the 5V
supply if there is any significant resistance in the path between the supply
and the unit, for instance, when powering it via a USB cable.
A 5V supply is required for the Pico,
LCD screen and PCM5102A module,
while 3.3V is needed for the trigger
input protection and rotary encoder
circuitry. The op amp runs from a ±9V
split supply; the supply rails for the
buffer amplifier must be several volts
greater than the desired maximum output and referenced to the analog rather
than digital ground plane.
Mixed-mode circuits should have
separate ground planes for the analog
and digital sections. These should be
joined at only one point, preferably
under the DAC chip. The PCM5102A
module provides this feature, while a
10W resistor between the two ground
planes ensures they remain closely
coupled if the unit is tested without
the DAC module in place.
The device is powered from an
external 12V DC source, with 9V linear regulator REG1 stabilising the supply for the linear electronics, plus 5V
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Parts List – WiFi DDS Function Generator
1 double-sided PCB coded 04104241, 149 × 108mm
1 Raspberry Pi Pico W microcontroller programmed with 04104241A.uf2 (MOD1)
1 micro Type-B to Type-A USB cable (for programming the Pico W)
1 PCM5102A DAC module (MOD2)
1 200 × 114 × 40mm plastic instrument case [Altronics H0378]
1 12V 500mA+ plugpack (tip positive)
1 3.5in SPI TFT LCD touch screen (LCD1) [Silicon Chip SC5062]
4 PCB-mount RCA sockets (CON1, CON2, CON4 & CON5) [Altronics P0208C/P0145A,
Multicomp Pro PSG01547, Keystone 97x series, Cliff FC68371]
1 PCB-mount coaxial power socket (CON3; size to suit plugpack)
[Altronics P0620, Jaycar PS0519]
1 rotary encoder (S1) [Jaycar SR1230 (D shaft) or Silicon Chip SC5601]
1 ‘scrubber’ knob [Adafruit ADA-2055 (D shaft),
Multicomp Pro MP716XX (splined or D shaft)]
2 white momentary PCB-mount pushbutton switches (S2 & S3)
[Altronics S1099, Jaycar SP0723, C&K D6R (no LED) series]
2 red momentary PCB-mount pushbutton switches (S4 & S5)
[Altronics S1095, Jaycar SP0720, C&K D6R (no LED) series]
2 20-pin headers, 2.54mm pitch (for mounting the Pico W)
2 20-pin header sockets, 2.54mm pitch (for mounting the Pico W)
1 9-pin header, 2.54mm pitch (for mounting the PCM5102 module)
1 9-pin header socket, 2.54mm pitch (for mounting the PCM5102 module;
eg, cut from a longer strip)
1 6-pin header, 2.54mm pitch (for mounting the PCM5102 module)
1 6-pin header socket, 2.54mm pitch (for mounting the PCM5102 module)
3 8-pin DIL IC sockets (optional; for IC1, IC2 & REG3)
2 A5 laminating pouches for top and rear decals, 120 microns preferred
Hardware
4 10mm M3-tapped spacers
4 6mm M3-tapped spacers
2 M3 × 8mm panhead machine screws
4 M3 × 16-25mm countersunk head machine screws
4 M3 × 12-16mm countersunk head machine screws
10 M3 hex nuts
4 small self-adhesive rubber furniture bumpers [Bunnings 0262216]
1 small tube of thermal paste OR 2 TO-220 thermal washers
Semiconductors
1 NE5532 dual low-noise op amp, DIP-8 (IC1)
1 24C256 256kb serial CMOS EEPROM, DIP-8 (IC2) [Jaycar ZZ8485]
1 7809 9V 1A linear regulator, TO-220 (REG1)
1 7805 5V 1A linear regulator, TO-220 (REG2)
1 MAX1044 switched capacitor voltage converter, DIP-8 (REG3)
[element14, DigiKey, Mouser]
1 BAT54S 25V 200mA dual series schottky diode, SOT-23 (D1)
1 1N5819 40V 1A schottky diode, DO-41 (D2)
1 red 3mm LED (LED1)
1 blue 3mm LED (LED2)
2 white 3mm LEDs (LED3, LED4)
Capacitors
3 220µF 16V electrolytic
2 10µF 16V electrolytic
11 100nF 50V X7R ceramic
4 220pF ±5% polystyrene, MKP, MKT or NP0/C0G ceramic
1 100pF 50V ceramic
Resistors (all 1/4W 1% axial leaded)
4 10kW
2 5.6kW
4 4.7kW
10 2.2kW
1 1kW
4 10W
Parts for optional stand
4 3mm acrylic laser-cut pieces [Silicon Chip SC6932]
4 small self-adhesive rubber furniture bumpers [Bunnings 0262216]
1 small tube of superglue
WiFi DDS Function Generator Short-Form Kit (SC6942, $95): includes everything
except the case, USB cable, power supply, labels and optional stand. The Pico W is
supplied unprogrammed.
linear regulator REG2 to supply the
Pico, LCD screen and DAC module.
The DAC module has an onboard 3.3V
regulator to supply its needs, providing adequate filtering of any noise fed
back into the 5V supply from the digital circuitry.
The 3.3V rail that provides clamping protection for the trigger input and
the rotary encoder debouncing is taken
from the Pico’s 3.3V output pin.
To reduce the 5V regulator’s heat
dissipation, its input is supplied by
REG1’s output (9V) rather than directly
from the 12V supply. The unit draws
around 210mA when driving two 10V
peak-to-peak sinewaves into 600W
loads, so REG1 typically dissipates
no more than 630mW ([12V – 9V] x
210mA).
The -9V rail for the analog electronics (primarily the op amps) is generated by a MAX1044 switched capacitor voltage inverter chip (REG3) running at its boosted frequency to avoid
in-band noise. The two 10µF electrolytic capacitors set the MAX1044’s
oscillator frequency to around 100kHz,
well above the maximum sinewave
frequency.
Schottky diode D2 ensures the
output voltage never rises above 0V,
which could otherwise occur when
operating the unit without the DAC
module in place, as the +9V rail is
established before the MAX1044 starts
oscillating. Without D2, the rise in
AGND’s voltage relative to GND is
enough to exceed the limit of allowable voltage on the MAX1044’s output
pin, causing it to fail.
The optional laser-cut acrylic stand. The
lettering on the sides has been removed
from the final version.
Further attention has been paid to
limiting the coupling of digital signal noise to the linear elements of the
project. The high-speed digital signals
supplied to the DAC module have 22W
series resistors to reduce noise induction due to spikes and ringing generated from any trace capacitance and
impedance mismatch.
The ±9V supplies pass through RC
low-pass filters comprising 10W resistors and 220µF electrolytic capacitors in parallel with 100nF ceramic
capacitors before being applied to the
op amp. These components decouple
the supplies from the digital ground
plane while keeping the voltage drop
Scope 5: the signal level change is minimised at sweep step
boundaries to avoid generating transients.
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Silicon Chip
manageable. This allows full-scale
output into 600W before any increase
in distortion.
Filtering
DACs produce wideband high-
frequency noise as output level
changes are in discrete steps. In the
unfiltered blue and orange trace waveforms seen in Scopes 3 & 4, the output is not a pure sinewave, and signal
changes occur at closer intervals than
the sampling rate would suggest. This
is because the DAC is oversampling,
smoothing out changes by producing
intermediate values at 384kHz.
Second harmonic sinewave dis-
Scope 6: a 10kHz square wave at the DAC output
(blue trace) and after filtering (green trace). Both show
significant overshoot compared to the improved version
(see Scope 2).
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siliconchip.com.au
extremes in each half-cycle improves
this (Scope 2).
The waveform becomes quite
rounded once the frequency rises past
16kHz (see Scope 1).
The green trace in Scope 7 shows
smoothing of the slope of a 5kHz triangle wave by the analog filter. Note that
the filter doesn’t noticeably increase
the rounding at the top of the triangle
wave, which is an artefact of the DAC’s
digital filter.
Triggers
Fig.7: the two-pole Sallen-Key low-pass filter is designed to attenuate the
signal by less than 0.1dB at 70kHz but more than 20dB by 384kHz.
tortion is significantly decreased by
oversampling, particularly at higher
frequencies.
A digital filter in the DAC chip
provides a 60dB reduction in artefacts above the Nyquist limit, which
is half the sampling frequency. The
digital filter also restricts the signal
slew rate.
Analog filtering is provided to further reduce unwanted high-frequency
signal components. The two-pole
Sallen-Key filter built around IC1 is
designed to be maximally flat within
the passband and just a fraction of a
dB down at 70kHz (see Fig.7). The filter has a gain of two.
The values of the 2.2kW resistors
connecting from the DAC outputs to
the input of the op amp based filters
are lower than might be expected. That
is because the DAC module has 470W
series output resistors. The result of
this filter can be seen in the substantially smoother green traces in Scope
3 & 4.
Square waves are the most impacted
by both the digital and analog filters.
Scope 6 shows the DAC and filtered
outputs of a 10kHz square wave. The
DAC’s digital filter generates some
overshoot at the top of the cycle and
some ringing at the bottom. Setting the
last sample halfway between the two
Scope 7: the filtered output of a 5kHz triangle wave
doesn’t have noticeably more rounding at the top than the
unfiltered signal.
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A short 3.3V trigger pulse is produced at the start of burst, step and
sweep waveforms on channel A. In
sweep mode, the trigger output is set
at the start of the sweep and reset at
the end of the first step. For step mode,
the trigger signal alternates at the end
of each up/down staircase.
To enable more reliable oscilloscope
triggering at very low frequencies, a
trigger output pulse is also produced
for the midpoints of channel A sine,
square and triangle signals.
The trigger pulse is synchronised
to signal calculations rather than the
DAC output. As Scope 8 shows, the
trigger can be seen to lead the DAC
output signal change by several milliseconds.
This is because the calculated values are passed to the DAC using five
512 sample DMA buffers, which
allow accurate timing for the transfer
of samples to the DAC by the Pico’s
hardware.
The time lag can vary between
four and five buffer times (10-13ms),
Scope 8: the trigger output pulse comes 10-13ms before
the generated signal since the signal is buffered before
transmission by the DAC.
Australia's electronics magazine
May 2024 49
depending on where the DAC and CPU
are up to emptying and filling buffers.
At frequencies of 10Hz and below,
this jitter becomes a small fraction of
the waveform and triggering is relatively stable.
Channel A sweep, burst and step
waveforms may be triggered using an
external signal or an SCPI command.
When enabled, a rising or falling edge
will trigger the function. Two 4.7kW
series resistors, a 100pF parallel capacitor and two schottky diodes clamping
the signal within the 0V & 3.3V supply
rails protect the Pico’s trigger input pin
from ESD or accidental application of
the wrong voltage.
Schmitt triggers are configured on
the Pico’s GPIO inputs, reducing false
triggering from noisy sources, such as
switches and relays.
Component selection
PCM5102A DAC modules are available from many online suppliers. The
PCB accommodates either of the two
most common module layouts (see the
photos below).
The one with L-shaped pinouts is
preferred, as it has separate 3.3V regulators for the analog and digital supplies to the PCM5102A IC.
I tested an OPA2134 op amp, but
the NE5532 is preferred as it is significantly cheaper and has slightly lower
2nd harmonic distortion across the
5-30kHz range.
Some components related to the
NE5532 filters need close tolerances
and linear dielectrics for good performance, so make sure the parts you
These are the two PCM5102 modules
that can be used in this design. We
recommend the one on the left; we
expect it to have lower output noise as it has separate
3.3V regulators for the analog and digital functions.
use meet the specifications in the
parts list.
If suitable leaded capacitors are
unavailable, SMD capacitors with
an M3216/1206 or M2012/0805 footprint can be soldered across the pads
on the PCB, assuming they meet the
minimum specifications. 1% tolerance resistors are adequate throughout the design.
The 3.5” LCD SPI touchscreen is
commonly available and is the same as
used in the Micromite LCD BackPack
V3. It is available from the Silicon
Chip Online Shop, along with the PCB
for this project and some other parts.
The footprints for PCB-
mounting
RCA sockets are unfortunately anything but standard. The two most common footprints can be accommodated
on the PCB and are available from
multiple suppliers, eg, Altronics has
P0208C or P0144A, while other major
parts suppliers stock at least one of
Cliff FC68371, Keystone 970 series,
Lumberg 1553-02 or Multicomp Pro
PSG01547.
Switched or unswitched varieties
can be used. The centre height of the
RCA connector barrel varies between
types, which will affect the case drilling.
We recommend using headers to
mount the PCM5102A and Pico modules to facilitate commissioning and
debugging. Sockets for the three 8-pin
DIP ICs are optional.
Rotary encoders come with either
splined or D-shaped shafts; either can
be used. I prefer ‘scrubber’ knobs with
a small dimple on the top. The most
commonly available is the Adafruit
35mm Scrubber Knob, which fits a flatted shaft. Whichever knob you select,
make sure that the shaft fitting of the
encoder matches the knob’s.
Next month
Part two of our series on building
the WiFi DDS Function Generator next
month will have all the construction
details, programming instructions,
testing procedures and usage instrucSC
tions.
U Cable Tester
S
B
Test just about any USB cable!
USB-A (2.0/3.2) USB-B (2.0/3.2)
USB-C Mini-B Micro-B (2.0/3.2)
Reports faults with individual cable
ends, short circuits, open circuits,
voltage drops and cable resistance etc
November & December 2021 issue
siliconchip.com.au/Series/374
DIY kit for $110
SC5966 – siliconchip.com.au/Shop/20/5966
Everything included except the case and batteries, see our website for postage rates
50
Silicon Chip
Australia's electronics magazine
siliconchip.com.au
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