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M k 2 Variable Speed Drive For Induction Motors Part 1 by Andrew Levido This new VSD significantly improves on our previous design. It’s more compact, lighter, better cooled, and more efficient. It has better safety margins (making it more robust) and some new features. W e last published an induction motor speed controller more than ten years ago (April & May 2012; siliconchip.au/Series/25), so we thought it was high time to revisit this project and improve it where possible. Some critical components used in the old design, notably the integrated IGBT/driver module, are now obsolete. We can take advantage of some other technological advances to make this unit smaller, more efficient and easier to build. We have used a compact tunnel heatsink, with active cooling via a small DC fan, to significantly decrease the size and weight of the unit compared to its predecessor. Other things contribute to its compactness, like using switch-mode AC/DC converters rather than transformers and active discharge of the HV capacitor bank, rather than bulky power resistors acting as bleeders. Functionally, the speed controller is similar to the previous unit in that it is designed to run single-phase shaded pole or permanent split capacitor (PSC) motors rated up to 1.5kW (2 horsepower) or any three-phase induction motor of a similar rating, as long as it can be configured for 230V operation (most can). 24 Silicon Chip Like all such drives, the Variable Speed Drive (VSD) described here is not generally suitable for use with induction motors with centrifugal switches, since the start windings in these motors are not rated for continuous operation. You can read more about that in the separate article on how induction motors work. An induction motor’s power rating describes the output power at the shaft, not the electrical input required to run it. For example, your average 1.5kW single-phase induction motor draws a full-load current of 8.9A with a power factor of 0.95. That means the real power input is around 2kW, suggesting an efficiency of about 73%. For a three-phase 1.5kW motor, the typical full-load phase current will be about 5.5A at a power factor of 0.82, giving a similar real power input. This VSD can deliver around 9A continuously in single-phase mode and around 5.5A per phase in threephase mode. It can deliver twice this current on a very short-term basis when starting the motor. The output frequency can be varied from 0.5Hz to 50Hz with a set point resolution of 0.25Hz. When ramping between set point frequencies, the frequency steps are even smaller than this. Australia's electronics magazine Features The basic topology of the power electronics is shown in the upper part of Fig.1. Power from the mains is rectified and filtered to create a DC ‘bus’ voltage of around 330V. This DC bus voltage is then pulse-width modulated by an IGBT bridge to produce the desired output voltage. Only two of the output IGBT pairs (the U and V phases) are used in single-­ phase mode. This part of the circuit operates at mains voltages and stores considerable energy. Contact with any part of this can be lethal – so exercise care. Because of this risk, the user controls, shown diagrammatically in the lower part of Fig.1, are isolated from the power circuit and near Earth potential. The board has six DIP switches for setting the operation modes. These are only read at start-up, so changing any of these while the speed controller is powered up has no effect until the next restart. If the first of these switches is closed, it selects three-phase motor operation; otherwise, the controller operates in single-phase mode. The second and third switches are related to pool pump operation. Running a pool pump at a lower speed can siliconchip.com.au Fig.1: a basic overview of how the VSD works. At this ‘zoomed out’ level, it’s similar to the previous IMSC (Induction Motor Speed Controller); the mains is rectified and charges a DC capacitor bank. The voltage from that bank is chopped by three IGBT half-bridges and applied to the motor windings, with the isolated control circuitry shown below. save a considerable amount of energy in cases where the pump has to run for a long time – such as when a saltwater chlorinator is used. These typically must run for four to eight hours daily in summer to produce sufficient chlorine. Under these circumstances, running the pump at 50% or even 75% of full speed can save a lot of energy. Just make sure the pump speed is high enough to keep the chlorinator cells covered and that the whole water volume is turned over at least once during each daily cycle. If you operate a pool pump at reduced speed, it can be a good idea to run the pump for a short time at full speed first, to ensure the pump is primed and to purge any air from the system. That is the purpose of the pool pump mode. If the Pool Mode DIP switch is closed, the VSD will initially ramp the motor up to full speed and hold it there briefly before ramping to whatever operating speed the user has set. The Pool Time DIP switch controls the duration of this full-speed period. If left open, the full-speed period is about 30 seconds; if it is closed, the time is extended to five minutes. The Pool Mode and Pool Time siliconchip.com.au switches are ignored if three-phase mode is selected. The speed control signal can come from either an onboard trimpot or an external potentiometer/control voltage. The latter option is selected by closing the External Speed DIP switch. Alongside the speed input terminal, 5V reference and ground terminals are provided for use with an external pot. The reference can comfortably source 10mA, so any pot with a resistance of 500W or more can be used. You can also feed a 0-5V signal into this terminal to control the motor speed from an external device. The common terminal for the speed control is referenced to the mains Earth. In addition to the internal speed control pot, there is a second trimpot Variable Speed Drive Features & Specifications » Can drive single-phase shaded pole or PSC motors up to 1.5kW » Can drive three-phase 230V induction motors up to 1.5kW » Speed range: 1% to 100% of full speed in 0.5% steps » Runs from a standard 10A GPO » Inbuilt mains EMI/RFI filter » Robust inrush current limiting » Higher efficiency than our previous design » Fan-based cooling for critical components » Uses standard, discrete IGBTs for switching » Compact and lightweight » Over-current and over-temperature shutdown » Pool pump mode » Three-phase motors can be reversed at any time (they will slow down, stop, reverse and speed back up) » Adjustable speed ramp rate » Internal or external controls for speed, on/off and emergency stop » Relay outputs that switch when the motor is up to speed or on a fault Australia's electronics magazine November 2024  25 Fig.2: a somewhat more detailed view of how the VSD works. The soft starter & discharger block limits the inrush current into the capacitor bank when power is first applied and ensures that the bank discharges quickly when mains power is lost. Two similar AC-DC converters supply power to the ‘hot’ and isolated sections, with an eight-channel digital isolator bridging them. to set the ramp rate. This controls how quickly the motor speed changes. The ramp rate can be set between three and 60 seconds for a ramp from zero to full speed. The longer ramp times may be necessary for high-inertia loads. To get the speed controller to start, both the Run and E-Stop circuits must be closed or 12V fed into the relevant terminals from some external source. Opening the emergency stop (E-Stop) terminals immediately switches the IGBTs off, letting the motor freewheel to a stop. Opening the Run circuit causes the motor speed to ramp down to zero before the IGBTs are switched off. The final external input is the Reverse control. This is only relevant in three-phase mode, and it sets the direction of rotation of the motor, effectively changing the phase sequence at the output. If you switch to the opposite direction while the motor is running, it will ramp down to zero, pause for two seconds, then ramp up again in the new direction. Three LEDs indicate the VSD’s operating status. The green LED indicates that the motor is running. It flashes quickly when the motor is ramping up or down and is illuminated steadily when the preset speed is reached. During the pool pump full-speed period, the green LED flashes slowly. The yellow LED indicates that the speed controller is in idle mode. This 26 Silicon Chip means the IGBTs are off, but the VSD is ready to run once the E-Stop and Run switches are closed and a nonzero speed signal is applied. The red LED indicates a fault condition. If just the red LED is illuminated, the fault is either an overcurrent trip or the DC bus voltage has risen too high. If the red and yellow LEDs are both lit, the heatsink temperature has become dangerously high. Either way, the fault can be reset by cycling power or toggling the E-Stop switch (opening then closing it) after the fault has cleared. An output relay (RLY2) provides a set of uncommitted isolated changeover contacts that the user can employ as they see fit. The At-Speed DIP switch configures the relay function. If the DIP switch is open, the relay activates when a fault occurs. If closed, the relay activates when the motor has reached the preset speed. The Boost DIP switch increases the motor voltage at very low speeds. You may need to switch this in to reliably start constant-torque loads such as displacement pumps, conveyers or hoists. Some pool pumps may also require this boost since the pump seals can sometimes become ‘sticky’ if the pump has been stationary for some time. How it works Fig.2 is a block diagram of the VSD showing the two distinct power Australia's electronics magazine domains. The high-voltage section containing the power electronics is shown in red, while the low-voltage part with the control circuitry is shown in green. As we step through the full circuit (Fig.3), it may be helpful to refer to this diagram as well. The mains input first passes through a 10A slow blow fuse, F1 – a last line of defence in case of a catastrophic failure. It then passes through an EMI filter consisting of the common-mode inductor L1 and six capacitors. The EMI filter is there to minimise the high-frequency artefacts (of which there are plenty in a circuit of this type) making their way back to the mains supply. The mains supply is then rectified by a full-bridge rectifier, BR1, and applied to the five parallel DC bus capacitors via a soft start/discharge circuit. Thermistor NTC1, which has a resistance of around 10W when cold, limits the capacitor bank inrush current to about 35A peak. We use a specialised inrush-limiting thermistor here because it would be difficult to guarantee the reliability of a generic power resistor in this application. The thermistor used here is rated for a maximum capacitor inrush energy of 150J. The maximum energy that our capacitor bank can store is 110J (from E = ½CV2) if the mains siliconchip.com.au The third (black) cable gland is for wiring to an optional external controller, which can be as simple as the one shown here. voltage is at its upper limit of 260V. The thermistor’s resistance drops dramatically as it heats up, and it can continuously pass 15A – more than enough for this application. However, unlike the original controller, we have chosen to short it out with relay RLY1, which closes once the capacitors are charged. This simultaneously disconnects the capacitor discharge section when the speed controller is operating. Shorting out the NTC thermistor has a few advantages. Firstly, it increases efficiency and reduces heat dissipation in the case due to the thermistor’s resistance. It also cools down more quickly after the unit is switched on, so it will effectively reduce the inrush current if the unit is switched off and then (almost) immediately on again. The capacitor discharge circuit is also an upgrade from the previous design. There, we used three bulky 5W power resistors, which resulted in a discharge time of about 90 seconds and continuous power dissipation approaching 10W (a complete waste). This time, we have used a constant-­ current discharge circuit based around transistors Q7 and Q8. This discharges the capacitors at a nominal 50mA, taking around 10 seconds, making the unit much safer to work on. Switching it out during operation again improves efficiency and greatly reduces the heating inside the case. siliconchip.com.au Adding RLY1 has eliminated a total of about 20W of continuous power dissipation compared to the previous design. The capacitor bank itself deserves a few words. The input current of any circuit like this, which rectifies and filters the mains, is very ‘spikey’ as the rectifier diodes only conduct at the very peak of the mains. This results in a pretty terrible input power factor and very high levels of ripple current in the capacitors. The current flowing out of the capacitors to the motor also contributes. A simulation (this is very hard to calculate any other way) showed this ripple to be around 10A RMS in total, or 2.0A RMS per capacitor. Therefore, it is essential to use capacitors designed for a 100Hz ripple current of at least 2A, like the Nichicon caps specified in the parts list. After the filter capacitors, there is a 15mW current-sensing resistor (more on this later) and more EMI suppression via another set of three X2/Y2 capacitors. These help to shunt any high-frequency artefacts on the DC bus to ground or Earth. Another big difference between this design and the previous Induction Motor Speed Controller (IMSC) is the use of discrete IGBTs (Q1 through Q6) and a separate driver chip (IC2) instead of an integrated power module. Australia's electronics magazine The DGTD65T15H2TF IGBTs used here are rugged devices rated at 650V/30A and specifically designed for motor drive use. They include an anti-parallel diode with similar ratings, and come in an isolated TO-220 case. The latter is important since we want to use an Earthed heatsink for safety and don’t want to have to fuss with insulating washers and the like. The diode bridge and discharge Mosfet, Q8, are also mounted on the heatsink; all use isolated packages for maximum convenience and safety. Driving the IGBTs The IGBTs are driven by a surprisingly inexpensive, specialised IGBT driver chip, the Infineon 6EDL04I06PT (IC2). The block diagram of this chip is reproduced in Fig.4. For each of the three phases, there are two logic-level inputs, one for the high-side IGBT and one for the low-side. In addition, a global enable pin (EN) must be high for any of the drivers to be active. These inputs pass through a noise filter to some logic that prevents both high-side and low-side IGBTs in the same phase from being switched on at once. The logic also ensures there is a short dead time when switching between high-side and low-side transistors or vice versa. About 310ns in length, this is sufficient to give one November 2024  27 Fig.3: the complete VSD circuit. The red dashed line is the isolation barrier; note how RLY1 also bridges it. Comparator IC5a’s output goes low if the capacitor bank voltage gets too high, while IC2 pulls the same FLT line low if an overcurrent condition is detected. Either way, the drive to the IGBTs shuts down. 28 Silicon Chip Australia's electronics magazine siliconchip.com.au siliconchip.com.au Australia's electronics magazine November 2024  29 Fig.4: a colourised and cleaned-up version of the internal block diagram from the 6EDL04I06PTXUMA1 IGBT driver data sheet. It provides all the functions we need to drive the six IGBTs and monitor the current draw in one package. IGBT time to turn off before its opposite number begins to turn on. The microcontroller also inserts dead time into the PWM signals, so this circuit provides some useful ‘belts and braces’ backup should something unexpected happen. From there, the high-side signals go to three high-side IGBT gate drivers via level shifters. This is necessary because these gate drivers are referenced to the high-side IGBT’s emitters via the VS1, VS2 and VS3 pins. In operation, these pins are switching alternatively between the negative side of the DC bus (when the low side IGBT is on) and the positive side of the bus (when the high-side IGBT is on). Most of the circuitry in the high-­ voltage domain, including the IGBT driver’s VSS pin, is referenced to the negative side of the DC bus. The circuit diagram shows this with a triangular ‘ground’ symbol. Do not confuse this with the common in the low voltage 30 Silicon Chip domain (shown with the usual ground symbol having three horizontal lines), which is referenced to mains Earth. You will also notice a ‘chassis Earth’ symbol in a few places. This symbol refers specifically to mains Earth connections. It consists of two thick horizontal bars with a series of diagonal lines coming off the lower one. Returning to IC2, the low-side drive signals are routed to the three low-side gate drivers via a delay block, which is necessary to match the delay introduced by the high-side level shifters. The low-side gate drivers are referenced to the COM pin, which is connected to the low-side IGBT emitters. This COM signal can float a few volts up or down with reference to VSS (HV_COM) since there may be some voltage drop across the 15mW current shunt resistor and the PCB traces. The IGBT driver is powered by a +15V supply applied to the Vcc pin. This supply is used for the logic and Australia's electronics magazine low-side drivers directly, but powers each high-side driver via three bootstrap circuits. These consist of internal bootstrap diodes connected between Vcc and three 2.2μF external capacitors connected to the VB1, VB2 and VB3 pins. When a low-side IGBT is on, the corresponding high-side driver’s bootstrap capacitor charges via its bootstrap diode. When the low-side driver is off, the diode is reverse biased, and the capacitor provides a floating power source for the high-side driver. An undervoltage lockout prevents the high-side driver from operating if its bootstrap voltage is not sufficient. Overcurrent and overvoltage protection The 6EDL04I06PT driver includes a trip circuit to protect the IGBTs from overloads or short circuits. This works by monitoring the voltage at the ITRIP pin and shutting down the drive to all siliconchip.com.au Single-Phase Induction Motors With a 3-phase supply, achieving a rotating magnetic field is easily achieved by spacing the three windings around the rotor. Swap any two of the phases and the field will rotate in the opposite direction. With a single-phase supply, the sole winding can only produce a pulsating field. There is no torque on the rotor when it is stationary, so it cannot start without some impulse to get it going. Once moving, the torque builds up. The motor will rotate equally well in either direction, depending on the sense of this initial kick. There are a few different schemes to give this initial kick-start. Manufacturers have not adopted a common set of terms to describe their various approaches, so the whole topic is potentially confusing. Below, we have summarised a few of the more common starting mechanisms: so usually limited to low power motors such as found in small domestic fans and blowers. These motors can be used with a speed controller such as the one described here but generally that would be an expensive solution for a low-power device. Shaded Pole 4 These are similar to the PSC motor in that a capacitor and start winding create a phase-shifted field for starting. The capacitor is larger and the start winding designed to draw significantly more current and therefore A shorted turn on the corner of the stator poles distorts the magnetic field to create a weak starting torque. Shaded pole motors are inefficient due to the shorted turn and Permanent Split Capacitor 4 A start winding in series with a capacitor produces a second, weaker field slightly out of phase with the main field. It is designed to draw a relatively modest current and rated for continuous operation. Permanent Split Capacitor (PSC) motors have low starting torque and are very reliable since there is no centrifugal switch. Typically used for fans and centrifugal (pool & spa) pumps up to about 2kW, these are suitable for use with a speed controller. Capacitor Start 8 START WINDING RUN WINDING RUN WINDING RUN WINDING START WINDING SHADED POLE CAPACITOR START PERMANENT SPLIT CAPACITOR START WINDING CAPACITOR START/RUN RUN WINDING RUN WINDING START WINDING CENTRIFUGAL START SWITCH provides a much higher starting torque. The start winding and capacitor are not rated for continuous operation and waste a lot of energy so are switched out by a centrifugal switch, typically at about 70% of full speed. They are used for conveyors, large fans, pumps and geared applications requiring high starting torque. Capacitor Start motors are not suitable for speed control use because at lower speeds the centrifugal switch will close and the start winding or capacitor may burn out. Capacitor Start/Run 8 These are the “big guns” of single-­phase motors and are used for machine tools, compressors, brick saws, cement mixers etc. They have a large start capacitor that is switched out by a centrifugal switch and a smaller run capacitor that is permanently connected to the start winding. They have very high starting torque and good overload performance. For the same reason as the capacitor start motors, they cannot be used with variable speed drives. A 3-phase motor is recommended in these applications if speed control is desirable. Centrifugal Start Switch 8 Commonly used on small bench grinders and column drills, these motors arrange a phase-shifted field with a resistive winding. Again, the start winding is only rated for intermittent operation (due to its high resistance) and will burn out if operated continuously. NOTE: in spite of the above warnings, some readers may want to try using the VSD with motors using a centrifugal switch to energise the start winding. The danger is that the start winding may be burnt out if it is energised for too long when operating at low speeds. There is also a risk that the over-current protection in the VSD will prevent normal operation. WARNING: DANGEROUS VOLTAGES This circuit is directly connected to the 230V AC mains. As such, most of the parts and wiring operate at mains potential. Contact with any part of these non-isolated circuit sections could prove fatal. Note also that the circuit can remain potentially lethal even after the 230V AC mains supply has been disconnected! To ensure safety, this circuit MUST NOT be operated unless it is fully enclosed in a plastic case. Do not connect this device to the mains with the lid of the case removed. Do not touch any part of the circuit for at least 30 second after unplugging the power cord from the mains socket. This is not a project for the inexperienced. Do not attempt to build it unless you understand what you are doing and are experienced working with high-voltage circuits. siliconchip.com.au Australia's electronics magazine November 2024  31 IGBTs if the voltage exceeds 0.45V. We use this to monitor the voltage across the 15mW shunt resistor, giving a nominal trip current of 30A. An RC low-pass filter consisting of a 1kW resistor and 470pF capacitor provides some immunity from false triggering due to noise. If an overcurrent condition is detected, the gate drivers are switched off, and a fault signal is asserted on the open-drain FLT pin, pulling the FLT line low. After a short time, dictated by the value of the 10nF capacitor at pin 11, the gate drivers are re-enabled, and the fault output is de-asserted. The 10nF value sets this time to about 20ms, long enough for the microprocessor to detect the fault condition, disable the IGBT driver and latch the fault state. In addition to the overcurrent detection provided by the IGBT driver, there is also an external overvoltage detection circuit on the DC bus. This voltage can increase when a motor is decelerated due to regeneration. The voltage rise can become significant if the load has a lot of inertia. In the worst case, it could exceed the capacitors’ voltage ratings. A voltage divider consisting of four series 100kW resistors and a 5.1kW resistor to HV common reduces the bus voltage by a factor of about 80. If the divider’s output reaches 5V, corresponding to a bus voltage of 400V, comparator IC5a’s open-collector output will pull the FLT line low. The overvoltage and overcurrent faults are therefore wire-ORed together to create a single fault signal that deactivates the IGBT drive of IC2 and is also transmitted across the isolation barrier (via IC4) to the microcontroller. Power supply and isolation The high-voltage domain circuity is powered by a small modular AC-to-DC switch-mode converter that supplies 15V (designated +15VH on the circuit diagram) at 5W from the mains. 5V linear regulator REG1 produces the +5VH rail for the fault logic and the digital isolators. The previous IMSC used a relatively large and heavy mains power transformer instead of a switch-mode supply. While there is an argument for preferring the simplicity of a transformer, these switch-mode supplies are less expensive, considerably smaller, lighter, and more efficient and allow 32 Silicon Chip Parts List – Variable Speed Drive 1 double-sided PCB coded 11111241, 150 × 205mm, black solder mask 1 Hammond HM1112/RP1455 220 × 165 × 60mm IP65 enclosure [Altronics H0312A] 1 Zettler ZP05S1500WB mains to 15V DC 5W AC/DC converter (MOD1) 1 Zettler ZP05S1200WB mains to 12V DC 5W AC/DC converter (MOD2) 2 M205 PCB-mount fuse clips (for F1) 1 10A M205 slow-blow ceramic fuse (F1) [Bel 5HT 10-R] 1 vinyl M205 fuse cover/insulator (for F1) [Keystone 3527C] 1 SL32 10015 10W 15A NTC thermistor (NTC1) 1 NRG2104F3435B2F 10kW lug-mount NTC thermistor (NTC2) 1 1.2mH 14A toroidal common-mode choke (CMC1) [Kemet SC-14-12J] 2 J107F1CS1212VDC.45 12V DC coil 12A SPDT relays (RLY1, RLY2) 2 10kW mini top-adjust single-turn 3362P-style trimpots (VR1, VR2) 1 6-way DIP switch (S1) [CUI DS01C-254-L-06BE] 7 vertical PCB-mounting 5mm pitch 4.8mm male spade lugs (CON1-CON7) 4 3-way mini terminal blocks, 5.08mm pitch (CON8-CON11) 1 2×5-pin keyed shrouded SMD box header, 1.27mm lead pitch (CON16) [CNC Tech 3220-10-0300-00] 1 3-pin header, 2.54mm pitch (CON17) 1 100mm-long 40 × 40mm tunnel heatsink [AliExpress 1005006064507597 or AliExpress 1005006255161284] 1 40 × 40 × 20mm 12V DC 0.3m3/minute maglev fan [Sunon MF40201VX-1000U-A99] 1 40mm fan guard & filter [Qualtek 09150-F/45] 1 10A mains extension cord 1 150mm length of 10A green/yellow striped wire 2 cable glands to suit the mains extension cord 7 4.8mm female spade crimp lugs to suit 1mm2 wire 2 4.8mm female piggyback spade crimp lugs to suit 1mm2 wire 1 100mm length of 8mm diameter blue heatshrink tubing 1 100mm length of 8mm diameter red heatshrink tubing 1 100mm length of 10mm diameter green/yellow striped heatshrink tubing 1 small cable gland (optional; for external control box) 1 external control box (optional; see separate parts list) 4 M3 × 25mm panhead machine screws 15 M3 × 10mm panhead machine screws 11 M3 spring washers 4 No.4 × 6mm self-tapping screws 1 small tube of thermal paste 1 small tube of superglue small zip-lock cable ties extra cabling required for connection to a 3-phase motor Semiconductors 1 6EDL04I06PTXUMA1 high-voltage three-phase H-bridge gate driver, SOIC-28 (IC2) 1 ISO7760DW six-channel unidirectional digital isolator, wide SOIC-16 (IC3) the unit to operate from a wide range of mains supply voltages. This brings us to another improvement on the earlier controller, which used opto-couplers to transmit the control signals across the isolation barrier. This design uses modern lowcost digital isolators. They work by modulating the input signal, passing it capacitively across an insulating barrier and demodulating it on the other side to reconstruct the original signal. The ones we used here have an isolation voltage of 5000V RMS (somewhat less of a ‘reinforced’ rating, but still plenty for mains work) and support data rates up to 100Mbps. Australia's electronics magazine You can get these digital isolators in all sorts of configurations. We use one with six channels, all going in the same direction (IC3) for the PWM signals, and one with two channels (IC4), one going in each direction, for the enable (EN) and fault (FLT) signals. The supply voltages on each side do not have to be the same. We have used 5V logic on the high-voltage side and 3.3V logic on the isolated (control) side. Control circuitry The STM32G030K6T6 microcontroller (IC7) is the heart of the control circuitry. This has a 32-bit ARM siliconchip.com.au 1 ISO7721FD two-channel bidirectional digital isolator, SOIC-8 (IC4) 1 LM393AD dual differential comparator, SOIC-8 (IC5) 1 LM358AD dual single-supply op amp, SOIC-8 (IC6) 1 STM32G030K6T6 32-bit ARM microcontroller with 32KiB flash, programmed with 1111124A.HEX, LQFP-32 (IC7) 1 LD1117S50 5V low-dropout linear regulator, SOT-223 (REG1) 1 LD1117S33 3.3V low-dropout linear regulator, SOT-223 (REG8) 6 DGTD65T15H2TF 650V 30A IGBTs, TO-220FP (Q1-Q6) 1 AOTF4N60L 600V 4A N-channel Mosfet, TO-220FP (Q7) 1 BC847C 45V 100mA NPN transistor, SOT-23 (Q8) 3 BSS138K 50V 220mA N-channel logic-level Mosfets, SOT-23 (Q9-Q11) 3 M2012/0805 size LEDs; red, yellow & green (LED1-LED3) 1 BZX84-C12 12V 250mV zener diode, SOT-23 (ZD1) 3 BZX84-C5V1 5.1V 250mV zener diodes, SOT-23 (ZD3-ZD5) 1 GBJ2506-F 600V 25A SIL bridge rectifier (BR1) 3 1N4148WT 75V 300mA switching diodes, SOD-523 (D2-D4) Capacitors (all SMD M2012/0805 size 50V X7R unless noted) 5 330μF 400V 105°C snap-in electrolytic, 30mm diameter, 40mm tall [Nichicon LGW2G331MELB40] 2 100μF 35V 105°C SMD electrolytic, 6.3mm diameter [Nichicon UCD1V101MCL6GS] 3 10μF 25V 4 2.2μF 25V 3 220nF X2 capacitors, 15mm lead pitch, 7mm wide [EPCOS/TDK B32922C3224K000] 6 4.7nF Y2 radial ceramic capacitors, 7.5mm lead pitch [Kemet C947U472MZVDBA7317] 12 100nF 1 10nF 1 470pF NP0/C0G 1 100pF NP0/C0G Resistors (all SMD M2012/0805 size ⅛W 1% unless noted) 1 470kW 4 100kW 2 82kW M6332/2512 size 1W [RC2512FK-0782KL] 1 18kW 1 13kW 4 10kW 1 5.1kW 1 4.7kW 3 2.2kW 1 2kW 10 1kW 1 470W 3 220W 7 12W 1 0W 1 15mW 3W M6432/2512 metal element current-sense resistor [Eaton MSMA2512R0150FGN] Optional External Control Box 1 small Jiffy box 1 panel label 3 SPST panel-mount toggle switches 1 1kW 16mm potentiometer 1 knob to suit the potentiometer 2 small cable glands 1 1m length of 9-core shielded data cable (or length to suit) Cortex M0+ core running at 64MHz, 32kiB of flash memory and 8kiB of static RAM (SRAM). It includes all the usual peripherals, including a timer designed specifically for motor control applications and comes in a 32-pin 0.8mm-pitch SMD quad package. CON16 allows IC7 to be reprogrammed in-circuit while CON17 provides a way to power it besides the mains supply. The motor speed can be set by one of two sources: an external 0-5V control signal or an onboard trimpot. The external speed input enters via pin 2 of terminal block CON8. A 1kW series resistor and 100nF capacitor to ground siliconchip.com.au provide noise filtering and protection for the op amp buffer (IC6b). The 470kW resistor prevents this input from floating if it is left unconnected. After buffering, the external speed signal is scaled by the voltage divider formed by the 1kW and 2kW resistors to suit the 0-3.3V range of the microcontroller’s internal analog-to-digital converter (ADC). The other half of the dual op amp (IC6a) creates a 5V signal to drive one end of the external speed pot. The 5V potential is derived from the 12V rail via the 18kW/13kW divider and filtered by a 100nF capacitor. It is then applied to op amp IC6a, which is connected Australia's electronics magazine as a current-limited unity-gain buffer. Suppose the current drawn from the 5V terminal is small. In that case, the voltage drop across the 470W resistor is low enough that the op amp is not in saturation, and the negative feedback (via the 10kW resistor) can maintain the output voltage at 5V. The op amp output will saturate if the current increases beyond about 14mA with these component values. Voltage regulation will be lost, but the current will be limited to a safe level. The three digital switch inputs (E-Stop, Run and Reverse) and their respective 12V sources are likewise protected from modest levels of accidental abuse. Taking the E-Stop input at CON9 as an example, the 220W series resistor limits the current that can be drawn from the 12V supply. The signal from pin 2 of CON9 passes through a voltage divider/pulldown/filter formed by 1kW and 2.2kW resistors plus a 100nF capacitor. Zener diode ZD3 clamps the resulting voltage to a maximum of 5.1V, which is within the safe operating range for the relevant microcontroller I/O pins. In addition to the external speed control, IC7 has three other analog inputs. The wiper voltages of the internal speed pot VR1 and ramp rate pot VR2 are each fed straight to the micro, with 100nF capacitors providing some noise filtering and buffering for the ADC sample-and-hold capacitor. The final analog input comes from NTC thermistor NTC2, which monitors heatsink temperature and is connected via CON12. The thermistor forms the upper leg of a voltage divider, with a 4.7kW fixed resistor forming the lower leg. The resulting voltage, related to temperature by a non-linear relationship, is fed directly to an ADC channel (PA02 pin 9) on the microcontroller. The microcontroller drives the two relays and the heatsink fan via moreor-less identical circuits. All three drivers use logic-level Mosfets (Q9, Q10 and Q11) as low-side switches, along with freewheeling diodes (D2, D3 and D4) and 10kW gate pulldown resistors. The microcontroller also drives the three LEDs via current-­ limiting resistors. The motor control timer inside the MCU uses seven I/O pins – six outputs for the three pairs of PWM signals, plus one input for the fault signal (HOT_ FLT). A separate general-purpose I/O pin is used for the enable (PWM_EN) November 2024  33 Scope 1: this scope grab shows three traces corresponding to the U, V & W outputs (CON4CON6). It shows that each is made up of two distinct pulse widths, corresponding to the two phase legs driving it; the use of centrealigned PWM doubles the effective switching frequency. The vertical scale is 500V/div. signal. Finally, six digital inputs configured with internal pull-up resistors are used to read the DIP switches (S1). Power for the control circuitry is derived from a second AC-to-DC switch-mode converter module (MOD2), this time one with a 12V output to suit the fan and relay coils. A linear regulator (REG8) derives a 3.3V rail for the microcontroller and associated circuitry from the 12V rail. Firmware Of course, a lot of the complexity of a project like this lies in the firmware. Fig.5 shows an overview of the three main blocks of the firmware architecture. As its name suggests, the I/O driver is responsible for managing all of the I/O functions except those related to the motor-control PWM. On initialisation, this driver reads the mode control DIP switches and stores their values for later use. The driver provides interface functions so the higher-level code can query the state of any switch at any time. Much of this driver’s functionality takes place in a low-priority interrupt service routine (ISR), which is called every 20 milliseconds by a hardware timer. This ISR scans the digital inputs corresponding to the E-Stop, Run Fig.5: the firmware’s three principal blocks. An I/O driver manages the digital and analog interfaces, a PWM driver generates the motor control signals, while a state machine controls the overall system logic. 34 Silicon Chip and Reverse switches. The inputs are debounced, and the resulting state is stored. The I/O ISR also starts the sequential analog-to-digital conversion of the four analog inputs (external and internal speed, ramp and heatsink temperature). Direct memory access (DMA) is used to read and store the results when available. This approach means the reading and processing of the inputs takes place more-or-less automatically. The state machine just has to call an interface function to get the most up-to-date analog or digital input data. In the case of the analog inputs, the reading functions scale the raw ADC values into meaningful units. The heatsink temperature read function switches the fan on if the heatsink temperature rises above 45°C and off again if it falls below 40°C. If the heatsink temperature exceeds 95C°, an over-temperature error is signalled, and when it drops below 70°C, the over-temperature error is cleared. Finally, the same ISR manages the flashing of the three LEDs. The state machine code only has to call an interface function once to initiate the flashing of a given LED an arbitrary number of times at a specified rate. PWM generation A separate module looks after the generation of the motor PWM signals. The timer used to generate the PWM includes (among many other things) a 16-bit counter and three comparison Fig.6: centre-aligned PWM is preferred for motor drive applications since the switching edges of each phase are not aligned, doubling the effective switching frequency seen by the motor windings and reducing EMI/RFI. Australia's electronics magazine siliconchip.com.au registers. The counter is clocked at 64MHz and is programmed to count from zero up to 2047, then down again to zero, as shown diagrammatically in Fig.6. On every clock cycle, the counter value is compared to the value in the compare registers to generate a centre-­ aligned PWM signal, as shown in that figure. Centre-aligned PWM is preferred for motor control since the switching edges on each phase are not aligned with each other, as would be the case if edge-aligned PWM was used. This means the phase-to-phase voltage across the motor windings switches twice as often, doubling the effective switching frequency and PWM resolution. The phase (IGBT) switching frequency is 15.625kHz, but the motor phase-to-phase windings see switching at twice this rate, or 31.25kHz, as you can see in Scope 1. This shows the three phase-to-phase voltages at a scale of 500V per division. You can see that each waveform has two different pulse widths, corresponding to the phase legs driving each end of the winding. The result is two transitions each 64µs period. The motor control timer also takes care of generating the complementary output signals to drive the high-side and low-side switches and inserting a dead-time between them, as shown in Fig.6. The timer’s final job is to ensure the outputs are placed in a known state if there is a fault. In our case, the timer is configured to switch them all low, turning off all the IGBTs, although this is fully configurable. This leaves our PWM code with the task of loading an updated pulse width value into each compare register every 64µs PWM cycle. To do this, a 32-bit ‘accumulator’ for each phase is incremented each time by an amount proportional to the desired output frequency. The upper eight bits of the accumulator are used as an index into a look-up table containing 256 samples of one cycle of the output waveform we want to produce. The appropriate sample is extracted, scaled according to the required output voltage, and loaded into the relevant compare register. Two accumulators and two PWM channels are used for a single-phase motor. The accumulators are initialised to values representing 0° and 180° in the table. The table contains siliconchip.com.au Fig.7: if we modulated each phase with a pure sinewave, the phase-to-phase output voltage would only be about 87% of the maximum (at top). Adding third harmonic content to the modulation allows us to achieve the maximum phaseto-phase voltage (around 230V RMS), demonstrated in the lower plot. values representing a sinusoid. For three-phase operation, three accumulators and three PWM channels are used, with the U, V and W accumulators initialised to positions 0°, 120° and 240° into the table for forward rotation or 0°, 240° and 120° for reverse rotation. Unlike the single-phase look-up table, the three-phase table does not contain samples of a pure sinewave. Instead, it contains values representing a sinusoid with about 16% of added third harmonic. Fig.7 shows why this is necessary. Starting at the top, sinusoidal phase voltages with a peak-to-peak value of 330V (shown dotted) produce phaseto-phase voltages (solid lines) with a peak-to-peak value of 570V. This corresponds to an RMS voltage of just 200V RMS, not the 230V we desire. If we modulate the phase voltages with a sinewave with an added third harmonic, as shown below, the peakto-peak phase voltages are the same as before, but the wave shape is very Australia's electronics magazine different. The resulting phase-to-phase voltages are nonetheless sinusoidal, but their peak-to-peak value is now 660V, giving an RMS voltage of 230V. State machine With the I/O and PWM taken care of, all that remains is to implement the motor controller’s application logic. This is done using a simple state machine. A state machine (properly a finite state machine) is a computational model that can be used to implement complex behaviour in a structured manner. The behaviour is modelled by several states, only one of which can be active at any given time; a set of transition rules determines how and when the machine can transition from one state according to external trigger events. Each state can have actions that are executed when it is entered, exited, or when a trigger event occurs. The simple version used here is always triggered by a regular timer ‘tick’, prompting the state machine to November 2024  35 Entry Action Trigger Action (Transition Rules) Exit Action - Initialise internal variables - Start IO Driver (reads mode switches) - Start PWM Driver (specify 1-phase or 3-phase) - Flash red, yellow & green LEDs twice, fast - Start soft start bypass timer (3 seconds) - if soft start bypass timer expired: - if 1-phase & Pool-mode transition to Pool-Pump state - else transition to Idle state - else no transtion - Close soft start bypass relay - Flash green LED slowly - Start pool pump timer (30 or 300 seconds) - Set speed_now to zero - Enable PWM - if fault transition to Fault state - if E-Stop open transition to Idle state - if Run open: - if speed_now > min_speed transition to Ramp state - else transition to Idle state - if pool pump timer expired transtion to Ramp state - if speed_now < pool_pump_speed increment speed_ now - else no transition - Turn green LED off - Disable PWM - Set speed_now to zero - Turn yellow LED on - Start idle dwell timer - if fault transition to Fault state - if idle dwell timer running no transition - if E-Stop open no transition - if speed_req > min_speed transition to ramp state - Turn yellow LED off - Read Reverse pin state - Flash green LED indefinitely fast - Set PWM direction (ignored if 1-Phase) - Set PWM speed to speed_now - Enable PWM (ignored if already enabled) - if fault transition to Fault state - if E-Stop open transition to Idle state - Get speed_req (speed demand, Run & Reverse states) - if speed_now ≤ speed_req – margin: - Increment speed_now (based on ramp, limit to speed_req) - Set PWM speed to speed_now, no transtion - else if speed_now ≥ speed_req + margin: - Decrement speed_now (based on ramp, limit to speed_req) - if speed_now < min_speed transition to Idle_state - Set PWM speed to speed_now, no transition - else transition to At-Speed state - Turn green LED off Fault state At-Speed state Ramp state Idle state Pool Pump state Initalise state Table 1: Software States - Assert At_Speed output (ignored if not enabled) - if fault transition to Fault state - Deassert At_Speed - Turn green LED on - if E-Stop open transition to Idle state output - if speed_now ≤speed_req – margin transition to Ramp - Turn off green LED state - if speed_now ≥ speed_req + margin transition to Ramp state - else no transition - Disable PWM - Set PWM speed to zero - Clear E-stop cycle flag - Assert Fault output (ignored if not enabled) - Set red LED - Set yellow LED if overtemp fault assess the transition rules associated with the current state and initiate a transition if required. If a state change is required, the state machine executes the current state’s exit actions, switches to the new state and executes its entry actions. The following trigger causes the new state’s transition rules to be evaluated. States are defined by three functions: an entry function containing the entry actions; a tick function 36 Silicon Chip - if faults cleared: - if E-Stop cycle flag clear: - if E-Stop open set E-stop cycle flag - no transition - else if E-Stop closed transition to Idle State - else no transition - else no transition containing the state change rules and tick actions; and an exit function containing the exit actions. By partitioning the VSD’s operation in this way, the controller’s logic becomes easier to understand and therefore implement and maintain. You can see this in Table 1, which describes the VSD’s operation in one neat summary. A total of six states are required, including an initialisation state where execution starts. The Australia's electronics magazine - Turn off red & yellow LEDs - Deassert Fault output timers described in the table are software timers driven by a 1ms interrupt provided to the state machine. The ‘tick’ time in the VSD is set to 100ms, meaning the state transition rules are evaluated 10 times per second. Conclusion That’s all we have room for this month. Next month, we will cover the construction, testing and use of the VSD. SC siliconchip.com.au