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Precision Electronics Part 4: Signal Switching In this fourth article in this series, we will look at how to extend the current measurement range of the circuit we’ve been working on so far. To achieve that, we’ll have to switch between two or more shunt resistors. By Andrew Levido I n the previous article in this series, we developed our current-sense circuit (Fig.1) to the point where we could measure a 0–1A current in the highside of a hypothetical power supply with a worst-case 25°C precision of around ±0.03%. Over the temperature range of 0–50°C, this error rose to just under ±0.2%. That was the analog error only; it did not include any errors introduced by the analog-to-digital converter (ADC), which we will go into in a future article. To achieve this level of precision, we were planning to apply a fixed gain calibration and a dynamic zero offset calibration in software, using the two switches shown in Fig.1. This level of precision would allow us to meaningfully measure current from 1A down to a few tens of milliamps, since our resolution is limited to ±2mA. To achieve the microamp or better current sensitivity that we desire, we determined that we needed to switch in different shunt resistors to provide a series of current ranges. So far, we have been using a 0.1W shunt resistor for the 1A range, which develops 100mV across it at full scale. This requires a differential-mode gain of about 25 to get our signal to a nominal 2.5V level for the ADC. Assuming our power supply has some voltage headroom, there is nothing stopping us from increasing the shunt resistance by an order of magnitude, so it drops 1V at full scale. We can then decrease the gain to a nominal value of 2.5. The power dissipation in the shunt resistor will increase accordingly, but any offset errors we see on the input side, including those that change with temperature, will be smaller in relation to the full-scale signal. That will improve the overall precision of the circuit. This will be important as the complexity – and therefore sources of uncertainty – of the circuit increases. Table 1 (below) shows the ranges we could potentially implement, the current resolution we could expect, and the shunt resistors we would need for each one. This table assumes we can maintain the ±0.2% error we have achieved so far. It suggests we should be able to realise our sub-microamp resolution ambitions if we can maintain a similar level of precision as we did with our previous efforts. Before we get into the details of how we will switch the shunt resistors in and out, and the impact that will have on precision, we should look at the options available for signal switching. There are basically only two options: 1. We can use a mechanical switch such as a signal relay if we want to control it with a microcontroller. 2. Alternatively, we can use some form of electronic analog switch, which will most likely be based on field-effect transistors (FETs). Signal relays Signal relays are similar to power relays, but their design is optimised for low on-resistance and high linearity instead of power handling. They are usually rated for currents of 2A or less and for switching voltages under 50V. These aren’t hard and fast definitions; there is plenty of grey area between the top end of signal relays and the bottom end of power relays. Relays have the advantage of excellent on-resistance linearity with applied voltage and temperature. They have a very high off-resistance (essentially infinite) and virtually zero leakage since the switching path is electrically isolated. Typical initial on-resistances for signal relays range from about 10mW to 200mW. The word “initial” is important here – the on-resistance of signal relays generally increases with the number of operations, as shown on the right side of Fig.2. This is an extract from a data sheet for Panasonic TQ-­series relays, although all brands behave in more or less the same way. It’s also worth noting that the operating and release voltages, shown on the left, also worsen slightly with time Table 1 – current ranges using a fixed 0.2% error Fig.1: this is the circuit we designed last time. It is capable of a measurement resolution of a couple of milliamps; to measure lower currents, we need to switch ranges somehow. 72 Silicon Chip Current range Resolution (±0.2%) RS (gain ≈ 2.5) 1.00A ±2.0mA 1.00W 100mA ±200µA 10.0W 10.0mA ±20µA 100W 1.00mA ±2.0µA 1.00kW 100µA ±200nA 10.0kW 10.0µA ±20nA 100kW 1.00µA ±2nA 1.00MW Australia's electronics magazine siliconchip.com.au Fig.2: relays make great signal switches, but we should be aware that their contact resistance and operating voltages deteriorate with the number of operations. as the relay’s mechanical parts wear. The failure rate data for the TQ relays suggests that 1% will have failed after 3.5 million operations and 10% after about 10 million operations when switching 5V at 1mA into a resistive load. That is a lot of operations, so it probably will not be of concern to the designer, but relays do have a limited life. Panasonic deserves a lot of credit for publishing very comprehensive data for their relays. Not all manufacturers are this up-front in their data sheets. Relays are not always good for very high-frequency applications, since their stray inductance and capacitance can be relatively high. Specialised high-frequency relays are available if you need them. For precision circuits, we often use reed relays, which can have very low stray capacitance (0.5pF) and are available with internal electromagnetic screens which can help minimise induced noise or be used as a “guard” electrode when measuring minuscule currents. A reed relay is essentially a reed switch that’s actuated by an electromagnet. On the downside, relays are usually somewhat bulky and expensive, so designers tend to use them only when their unique characteristics are absolutely necessary. Instead, they generally use more compact and cheaper analog switches where they can (which offer the added benefit of an almost indefinite lifespan). Analog switches Analog switches are typically built from Mosfets since their drain-source resistance is controllable via gate voltage and the channel can conduct current in either direction. Because a Mosfet’s channel resistance is non-­linear with applied voltage, most analog switches use back-to-back N-channel and P-channel Mosfets. The parallel on-resistance of the two devices is more linear than either one alone, as illustrated in Fig.3. The Mosfet substrates are connected to the analog power rails to maximise linearity. By the way, if you are familiar with using discrete Mosfets as high-power switches, you may be puzzled by the comment that they can conduct current in either direction. That’s Fig.3: most analog switches use parallel N-channel and P-channel Mosfets to minimise the effect of the non-linear channel onresistance of Mosfets. because power Mosfets usually have an unavoidable ‘body diode’ in parallel with the channel in one direction, meaning they can only really switch current in one direction by themselves. When fabricating multiple Mosfets on a single substrate as in a CMOS integrated circuit, the body diode is still there, but it is possible to choose where one end of that diode connects. Depending on what potential it is connected to, that body diode may never conduct under normal conditions, so it can effectively be ignored. Thus, Mosfets in ICs (as well as the fairly unusual four-terminal discrete signal types that expose the bulk connection separately) can operate bi-­ directionally, similarly to JFETs. The NMOS+PMOS architecture is used in switches such as those in the industry-standard DG41x series. Fig.4 shows the simplified circuit of one channel, extracted from the data sheet. As well as the back-to-back switching Mosfets, you can see a level shifter, which allows the control voltage (VIN) and logic supply (VL and GND) to be anywhere within the V+ to V– analog supply range. Fig.4: this simplified diagram of one switch from a DG41x series analog switch shows the parallel N-Channel and P-channel Mosfets. The level shifter allows the control signal and logic supply to be anywhere within the analog voltage range. siliconchip.com.au Australia's electronics magazine February 2025  73 Fig.5: the onresistance characteristic of this DG41x series analog switch shows the non-linearity and temperature dependence of the on-resistance. The DG41x series switch on-­ resistance characteristic with ±5V rails is shown in Fig.5. The nominal on-­ resistance is anywhere between 10W and 20W, depending on temperature, and varies about 30% as the signal voltage changes. The imprecision associated with analog switches can best be understood by looking at the on- and offstate equivalent circuits in Fig.6. In the on state (left), the on-resistance Ron appears in series with the source resistance Rsource to produce a voltage divider with the load resistance Rload. As we have seen, Ron is non-linear and temperature-dependant, so the voltage error due to this divider will be uncertain. For this reason, we usually try to keep the load resistance as high as possible with respect to the sum of Rsource + Ron. In the on state, a leakage current Id(on) will produce a DC error voltage proportional to Rload in parallel with Rsource + Ron. This can be minimised by keeping the source impedance as low as possible. The channel capacitance Cd(on) will appear in parallel with Cload and form an RC low-pass filter with Rsource + Ron – another reason to keep Rsource low if you can. In the case of the DG41x family of switches, Ron can be up to 35W, Id(on) can be up to ±15nA and Cd(on) is typically 35pF. In the off state (shown in Fig.6), the leakage current Is(off) will produce a DC voltage across Rsource, and ID(off) will produce a voltage across the load impedance, Rload. The latter can be more difficult to manage, since we generally want to use a high load impedance for reasons described above. The DG41x switches have Fig.6: these equivalent circuits show the leakage currents and internal capacitances present in analog switches in the on and off states. 74 Silicon Chip Australia's electronics magazine off-state leakage currents (ID(off) and Is(off)) of up to ±15nA, and CD(off) can be up to 9pF. Charge injection is another concern with analog switches, especially those with a low Ron value. Achieving low Ron requires physically large Mosfets, which have higher levels of gate capacitance. Whenever the gate of the Mosfet switches, this gate capacitance is charged or discharged via the drain and source. This means a charge is injected into the signal path when the devices switch. The resulting voltage disturbance is a factor of the switch output and load capacitance, as shown in Fig.7. The charge is injected via Cq and appears as a voltage spike or dip at the output, as CD(ON) in parallel with Cload charge or discharge. Each DG41x switch has a charge injection of 5pC. If the external load capacitance were 50pF, this would result in a voltage spike or dip of 59mV every time the switch changes state. This could very well create a significant ‘pop’ when switching audio signals – something to be aware of. Of course, the input signal to this type of analog switch must stay within the power rails. For switches with back-to-back complimentary Mosfets, the signal voltage can extend all the way to both rails. There are some newer analog switches with very good Ron linearity. These appear to use a single N-­ Channel Mosfet with a very flat Ron characteristic. Fig.8 shows the on-­ r esistance characteristic for one channel of the TMUX821x series of analog switches from Texas Instruments (TI). The on-resistance is very flat all the way Fig.7: charge injection can cause voltage transients in the signal path when an analog switch is opened or closed. The effect is usually worse in low-Rds(on) switches, where the gate capacitance (Cq) is higher. siliconchip.com.au Fig.9: this interesting class of optically coupled analog switches may be suitable for some applications. They can switch a few hundred milliamps and provide good isolation between the control signal & switch. Fig.10: this circuit ensures the current-carrying switches (S1a, S2b and S3c) are not in the measurement path. That’s helpful since the voltage drop across them is unpredictable. The shunt voltage sensing switches (S1b, S2b and S3b) carry no appreciable current, so the voltage drop across them will be minimal. from the negative supply up to a few volts short of the positive supply. With the ±15V supplies shown here, the upper limit on signal voltage is around 10V to 12V, depending on how much non-linearity you can put up with. Before we leave this discussion of analog switches altogether, I want to mention one more type that I have found useful in certain applications: optically coupled Mosfet switches, such as that shown in Fig.9. These are a bit of a hybrid between relays, analog switches and opto-­ couplers. They use inverse series Mosfets (for polarity independence), which are switched optically via an internal LED. A typical example, the AQY282GS, is rated for switching up to 60V (AC or DC) at 0.8A. It has a maximum on-resistance of 0.8W at 25°C, rising to twice that at 85°C. The manufacturer does not provide any linearity data, but we can assume it will not be great. They do have good input–output isolation (1000MW and 1.5pF), but up to 1µA of leakage between the output terminals when off. These devices are Fig.11: this circuit configuration was used to obtain the results described. Not shown are the DIP switches used to control the analog switches & relay coils. not super-fast – the switch-on time can be up to 5ms and switch-off up to 0.5ms. They are driven exactly like you would drive an optocoupler. Updating our design So, armed with all this knowledge, how do we go about designing our multi-range current sensing circuit? Whatever type of switch we use to select the shunt resistors, it will add a material and unpredictable voltage drop. We therefore can’t just put the Fig.8: the onresistance characteristic of the TMUX821x is remarkably flat for signal voltages from the negative rail up to a couple of volts short of the positive rail. This suggests a single Mosfet is being used. Note how the Rds(on) is still highly temperaturedependent. siliconchip.com.au Australia's electronics magazine switching element in series with the shunt and measure the voltage across them both. Instead, we need to use the topology shown in Fig.10. One of the “a” switches (S1a, S2a or S3a) is closed to select one of the shunt resistors, depending on the chosen current range. The corresponding “b” switch is also closed, connecting the relevant shunt resistor to the instrumentation amplifier’s inverting input. Since this input has a very high impedance, very little current flows through the “b” switch, so its on-­ resistance and non-linearity are largely irrelevant. The voltage drop across the active “a” switch, where appreciable current does flow, is not in the measurement path, so it does not impact the reading. As a bonus, we get the zero-­ calibration state for free. If we close any “b” switch that does not have its corresponding “a” switch closed, we effectively short the inamp’s inputs together via that shunt resistor, which will have close to zero voltage across it. I decided to build a version of this circuit with 1A, 10mA and 100μA full-scale ranges. In a real application, you would probably implement February 2025  75 Fig.12: this graph, copied from the manufacturer’s data sheet, shows the various leakage currents in the TMUX821x series of analog switches. As you would expect, they increase rapidly with temperature. a range for each decade, but I wanted to keep things manageable for my experiments. I chose to use relays for S1a and S2a (the 1A and 10mA range respectively), although an analog switch could certainly be used for the latter range. The 100µA range (S3a) and the three “b” switches used analog switches. This meant I could get away with just one quad analog switch package. The key parts on the test board are shown in Fig.11. A 3.3V logic power supply and the dip switches driving the relays and analog switch control lines are not shown. I used a 1% tolerance 3W resistor for R1, since high-precision power resistors are super expensive. I did, however, select a resistor with the best tempco (±20ppm/°C) that I could afford, since we can’t trim out the temperature drift as easily as we can trim out the absolute resistance error. It is easier (and cheaper) to get high-precision 100W and 10kW resistors, so I chose devices with 0.1% tolerance and 10ppm/°C tempcos. The relays I used were 3.3V coil 1A relays from Fujitsu’s SY series that I happened to have on hand. The primary concern with selecting the analog switch was to get a unit with a sufficient voltage rating, since the supply voltages would be +24V and -5V, giving a total supply span of 29V. DG41x-series switches are limited to a supply voltage span of 12V. Figs.13 & 14: the voltage error due to analog switch leakage is calculated by substituting the on and off equivalent circuits. As discussed in the text, the 600pA source can be ignored but the other two will cause an error. This diagram shows the 100µA range where the error is worse than the others. The simplified version is shown at right; it summarises the sources of error. 76 Silicon Chip Australia's electronics magazine The TMUX821x range is good to ±50V, which is more than enough. The TMUX8212 includes four independent normally open switches, which is perfect. From Fig.8, we can see that the analog switch on-resistance is under 5W at room temperature, with about ±1W change over the 0°C to 50°C range we are designing for. Fig.12 shows the leakage currents. At 50°C, the worst case for our design, Id(on) is ±10pA or less, while Id(off) and IS(off) are each less than ±300pA. Those figures are for ±36V supplies, so with our lower supply voltages, the values we experience are likely to be lower. However, in the absence of more detailed data, we have little choice other than to use those figures. I used the cheaper of the two instrumentation amplifiers that we tested last time, the INA821, but this time with the gain set to about 2.5. Like last time, the op amp is powered from +24V and -5V rails. Error budget The easiest way to manage the error budget for a circuit with several configurations like this one is to calculate a separate budget for each range. The process is exactly the same as for the examples we created in previous instalments, except for the errors introduced by the analog switches. We can distil the impact of the analog switches down to a single voltage error by substituting them with their equivalent circuits, as shown at the top of Fig.13. Here, the circuit is shown with the 100µA range active (with the two analog switches closed and both relays open). Fig.14 shows the same configuration with the leakage current sources consolidated. The 1W and 100W resistors disappear, since they are in series with current sources, which themselves have very high (theoretically infinite) source resistances. This simplification leaves us with three potential sources of leakage-induced voltage error. The 600pA current feeding into the power rail on the source side of the shunt resistor can be ignored, since this current must flow either back into the regulator (where it does not matter), or through the shunt to the load (where it will be measured as part of the load current). The 10pA source on the load side siliconchip.com.au Table 2: 100μA range At Nominal 25°C Abs. Error Rel. Error 0-50°C (Nominal ±25°C) Error Nominal Value Shunt Resistor: ERA-6ARB103V (±0.1%, 100ppm/˚C) 10kW Abs. Error Input voltage error due to shunt 1V 1mV 0.10% 0.25mV 0.025% Input voltage error due to switch leakage 0V 6.2μV 0% 0mV 0% Input voltage error due to bias (Ios ±0.5nA, ±20pA/˚C) 0V 5μV 0% 5μV 0% InAmp: INA821 (Vos ±35µv, 5µV/˚C) 0V 35μV InAmp Input Voltage error total (Sum of Lines 2-5) 0V 1mV 0.10% 0.380mV 0.038% InAmp Gain Resistor Rg: ERA-6ARB333V (±0.1%, 10ppm/˚C) 33kW 33W 0.10% 8.3W 0.025% 0.10% InAmp Gain Error (0.015% ±35ppm/˚C) Rel. Error 0.025% 125μV 0.02% 0.088% InAmp Gain (Line 7 × Line 8) 2.5 0.0029 0.12% 0.0028 0.113% Vout DM (Line 6 × Line 9) 0V 5.5mV 0.22% 3.8mV 0.151% Vout CM (20V, 100db, ±1.5db over 0-50˚C) 0V 200μV Vout (Line 10 + Line 11) 0V 5.7mV Table 3: 10mA range 37.7μV 0.23% At Nominal 25°C Abs. Error Rel. Error 3.8mV 0.152% 0-50°C (Nominal ±25°C) Error Nominal Value Abs. Error Shunt Resistor: ERA-6ARB101V (±0.1%, 10ppm/˚C) 100W Input voltage error due to shunt 1V 1mV 0.10% 0.25mV 0.025% Input voltage error due to switch leakage 0V 95nV 0% 0nV 0% Input voltage error due to bias (Ios ±0.5nA, ±20pA/˚C) 0V 50nV 0% 50nV 0% InAmp: INA821 (Vos ±35µv, 5µV/˚C) 0V 35μV InAmp Input Voltage error total (Sum of Lines 2-5) 0V 1mV 0.10% 0.3751mV InAmp Gain Resistor Rg: ERA-6ARB333V (±0.1%, 10ppm/˚C) 33kW 33W 0.10% 8.3W 0.10% InAmp Gain Error (0.015% ±35ppm/˚C) Rel. Error 0.025% 125μV 0.02% 0.025% 0.088% InAmp Gain (Line 7 × Line 8) 2.5 0.0029 0.12% 0.0028 0.113% Vout DM (Line 6 × Line 9) 0V 5.5mV 0.22% 3.8mV 0.150% Vout CM (20V, 100db, ±1.5db over 0-50˚C) 0V 200μV 37.7μV 0.038% Vout (Line 10 + Line 11) 0V 5.7mV 3.8mV 0.152% Table 4: 1A range 0.23% At Nominal 25°C Abs. Error Rel. Error 0-50°C (Nominal ±25°C) Error Nominal Value Abs. Error Shunt Resistor: VMP-1R00-1.0-U (±0.1%, 20ppm/˚C) 1W Input voltage error due to shunt 1V 10mV 1% 0.5mV 0.05% Input voltage error due to switch leakage 0V 4.5nV 0% 0nV 0% Input voltage error due to bias (Ios ±0.5nA, ±20pA/˚C) 0V 500nV 0% 500nV 0% InAmp: INA821 (Vos ±35µv, 5µV/˚C) 0V 35μV InAmp Input Voltage error total (Sum of Lines 2-5) 0V 10mV 1% 0.625mV 0.063% InAmp Gain Resistor Rg: ERA-6ARB333V (±0.1%, 10ppm/˚C) 33kW 33W 0.10% 8.3W 0.025% 1% InAmp Gain Error (0.015% ±35ppm/˚C) Rel. Error 0.05% 125μV 0.02% 0.088% InAmp Gain (Line 7 × Line 8) 2.5 0.0029 0.12% 0.0028 0.113% Vout DM (Line 6 × Line 9) 0V 28mV 1.12% 4.4mV 0.175% Vout CM (20V, 100db, ±1.5db over 0-50˚C) 0V 200μV Vout (Line 10 + Line 11) 0V 28.2mV siliconchip.com.au Australia's electronics magazine 37.7μV 1.13% 4.4mV 0.177% February 2025  77 of the shunt will cause an error since this current can flow into the load without being measured. This is the equivalent of under-reading the load current by 10pA, so it will result in a voltage error of up to 100nV (10pA × 10kW) at the op amp input. The 610pA leakage will similarly cause a voltage error, but this time the error will be seen across the series combination of the shunt resistance and the switch on-resistance. This error will be 6.1µV (610pA × [10kW + 6W]). The total voltage error introduced by the switches will therefore be ±6.2µV, which you can see in line 3 of the error budget table for the 100µA range. This is a meaningful amount compared with the instrumentation amplifier’s ±35µV input offset voltage. Given the relatively high shunt resistance, we also have to account for the impact of the instrumentation amp’s input bias currents. The difference between these currents (the input offset current) will cause an additional voltage error across the source resistance. The INA821’s data shows the maximum input offset current is ±0.5nA at 25°C, with a tempco (estimated from the graphs) of ±20pA/°C. This will result in a voltage error of ±5.0uV at 25°C with an additional ±5.0µV over the 0°C to 50°C operating range. This error, shown on line 4 of the error budget, is also similar in magnitude to the input offset voltage. Other ranges As you might expect from the above calculations, the error voltages will be lower for the other ranges where the shunt resistances are lower. I went through the same exercise for these ranges and came up with error voltages due to switch leakage of 4.6nV for the 1A range and 95nV for the 10mA range, plus input offset current errors of 500pV and 50nV, respectively. These are included in the relevant error budget tables (Tables 2-4), but are frankly so small as to be irrelevant given the instrumentation amplifier’s ±35µV offset voltage. The rest of the error budget tables are calculated as we did the last time. The upshot is a worst-case untrimmed 25°C error of ±1.13% for the 1A range and ±0.23% for the 10mA and 100µA ranges. The big difference is due to the 1% tolerance of the 1W shunt compared to the 0.1% tolerance of the other two. Over the operating temperature range, the 1A range has an additional ±0.18% error, with an extra ±0.15% for the 10mA and 100µA ranges. Recall that the circuit in the previous article had a worst-case untrimmed 25°C error of 0.65% with ±0.28% additional error over temperature. This circuit is better (except on the 1A range, where the shunt tolerance range has doubled) because we have used better-tolerance resistors and have reduced the instrumentation amp gain by a factor of 10. Testing As usual, I built the circuit and carefully measured its performance. The results are shown in the tables opposite (Tables 5-7). Again, we achieved much better performance than the worst-case calculations would suggest. The measured untrimmed errors were ±0.5%, ±0.06% and ±0.18% for the 1A, 10mA and 100µA ranges, respectively. To calculate the trimmed error results, I used a gain correction based on the line of best fit, but just used the measured zero-current output value as the offset, mimicking the dynamic offset correction process. The trimmed errors were ±0.036%, ±0.054% and ±0.031% for the three ranges – very similar to the values we achieved previously. The errors over the operating temperature range are around ±0.11%, assuming the offset calibration eliminates the offset component of the input-side temperature drift error. It would be around ±0.18% otherwise. We can probably say that, across all ranges, our circuit achieves better than ±0.06% error at 25°C and ±0.25% over the operating temperature range. This is on par with the performance we saw last time, and means we have more-or-less met the expectations we set in Table 1 for these ranges. As a paper exercise, I calculated the error budget for a possible 1µA full-scale range, assuming a 1MW 0.1% ±10ppm shunt. The worst-case untrimmed error at 25°C is ±0.35%, and the total error over the temperature range would be within ±0.6%, which is pretty good. With trimming, we could probably assume a current resolution in the order of ±5nA. This is about as low as I would go with this circuit. Once we get down to measuring such small currents, things become very challenging. A next obvious step will be to look into the analog-to-digital conversion process, to complete our theoretical PSU current-sensing design. However, in all of our work so far, we have entirely ignored one important source of uncertainty and error: noise. This is an interesting but complex topic that we need to know about before moving on. So we will cover it SC next time. Raspberry Pi Pico W BackPack The new Raspberry Pi Pico W provides WiFi functionality, adding to the long list of features. This easy-to-build device includes a 3.5-inch touchscreen LCD and is programmable in BASIC, C or MicroPython, making it a good general-purpose controller. This kit comes with everything needed to build a Pico W BackPack module, including components for the optional microSD card, IR receiver and stereo audio output. $85 + Postage ∎ Complete Kit (SC6625) siliconchip.com.au/Shop/20/6625 The circuit and assembly instructions were published in the January 2023 issue: siliconchip.au/Article/15616 78 Silicon Chip Australia's electronics magazine siliconchip.com.au Measured Data Untrimmed Error Trimmed Error I (mA) Vout (mV) Absolute (mV) Relative Absolute (mV) Relative 0.0000 -3.480 -3.48 -0.14% 0.00 0.000% 9.0707 223.366 -3.13 -0.12% 0.38 -0.001% 20.1549 500.500 -2.76 -0.11% 0.78 -0.007% 29.1271 723.712 -3.58 -0.14% -0.02 0.006% 38.4297 955.808 -3.77 -0.15% -0.18 0.016% 49.9203 1243.030 -3.46 -0.13% 0.16 0.018% 58.7674 1464.160 -3.24 -0.13% 0.41 -0.021% 72.2879 1801.780 -3.23 -0.13% 0.47 0.031% 80.1932 1998.150 -4.25 -0.17% -0.53 0.000% 86.6674 2160.290 -3.77 -0.15% -0.03 0.000% 95.1638 2373.240 -2.97 -0.12% 0.79 0.000% Silicon Chip Binders REAL VALUE AT $21.50* PLUS P&P Table 5 – 100μA range (Vcm = 20V). Measured Data I (mA) Untrimmed Error Trimmed Error Vout (mV) Absolute (mV) Relative Absolute (mV) Relative 0.00000 -0.773 -0.77 -0.03% 0.00 0.000% 0.98420 244.922 -0.83 -0.03% -0.06 -0.002% 1.98602 495.514 -0.39 -0.02% 0.38 0.015% 2.93840 733.371 -0.34 -0.01% 0.43 0.017% 4.18878 1045.728 -0.20 -0.01% 0.56 0.022% 4.98283 1244.140 -0.06 0.00% 0.70 0.027% 5.85370 1461.660 0.01 0.00% 0.76 0.030% 7.11774 1775.860 -1.42 -0.06% -0.67 -0.026% 7.99387 1996.360 0.31 0.01% 1.06 0.041% 8.68506 2169.050 0.42 0.02% 1.16 0.045% 9.53879 2382.450 0.64 0.03% 1.39 0.054% 10.64341 2658.070 0.44 0.02% 1.18 0.046% Table 6 – 10mA range (Vcm = 20V). Measured Data I (mA) Untrimmed Error Vout (mV) Absolute (mV) Trimmed Error Relative Absolute (mV) Relative 0.000 0.055 0.05 0.00% 0.00 0.000% 100.303 251.400 0.95 0.04% -0.27 -0.011% 199.851 500.786 1.76 0.07% -0.61 -0.024% 300.618 754.046 3.41 0.13% -0.14 -0.005% 400.330 1003.724 4.11 0.16% -0.59 -0.023% 500.944 1255.870 5.03 0.20% -0.85 -0.033% 601.552 1508.490 6.43 0.25% -0.61 -0.024% 701.079 1758.470 7.90 0.31% -0.31 -0.012% 800.656 2008.760 9.55 0.37% 0.18 0.007% 901.122 2261.360 11.29 0.44% 0.75 0.029% 1000.709 2511.350 12.61 0.49% 0.92 0.036% Table 7 – 1A range (Vcm = 20V). siliconchip.com.au Australia's electronics magazine Are your copies of Silicon Chip getting damaged or dog-eared just lying around in a cupboard or on a shelf? Can you quickly find a particular issue that you need to refer to? Keep your copies safe, secure and always available with these handy binders These binders will protect your copies of S ilicon C hip . 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